summaryrefslogtreecommitdiff
path: root/src/shifter/extract.rs
blob: d4ff6e0c5db60665273680417bb5963409999050 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
/*
	Copyright 2021-2023 Gabriel Jensen.

	This file is part of Luma.

	Luma is free software: you can redistribute it
	and/or modify it under the terms of the GNU
	Affero General Public License as published by
	the Free Software Foundation, either version 3
	of the License, or (at your option) any later
	version.

	Luma is distributed in the hope that it will be
	useful, but WITHOUT ANY WARRANTY; without even
	the implied warranty of MERCHANTABILITY or
	FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	Affero General Public License for more details.

	You should have received a copy of the GNU
	Affero General Public License along with Luma.
	If not, see <https://www.gnu.org/licenses/>.
*/

use crate::shifter::Shifter;

use std::hint::unreachable_unchecked;

impl Shifter {
	pub fn extract(opcode: u32) -> Self {
		use Shifter::*;

		match opcode & 0b00000010000000000000000000000000 != 0x0 {
			false => {
				let rm = (opcode & 0b00000000000000000000000000001111) as u8;

				let shift          = (opcode & 0b00000000000000000000000001100000).wrapping_shr(0x5) as u8;
				let register_shift = opcode & 0b00000000000000000000000000010000 != 0x0;

				match register_shift {
					false => {
						let imm = (opcode & 0b00000000000000000000111110000000).wrapping_shr(0x7) as u8;

						return match shift {
							0b11 => match imm {
								0x0 => RotateRightExtend(   rm),
								imm => RotateRightImmediate(rm, imm),
							},

							shift => {
								match shift {
									0b00 => LogicalShiftLeftImmediate(rm, imm),

									0b01 => LogicalShiftRightImmediate(rm, match imm {
										0x0 => 0x20,
										imm => imm,
									}),

									0b10 => ArithmeticShiftRightImmediate(rm, match imm {
										0x0 => 0x20,
										imm => imm,
									}),

									_ => unsafe { unreachable_unchecked() },
								}
							},
						};
					},

					true => {
						let rs = (opcode & 0b0000000000000000000111100000000).wrapping_shr(0x8) as u8;

						return match shift {
							0b00 => LogicalShiftLeftRegister(    rm, rs),
							0b01 => LogicalShiftRightRegister(   rm, rs),
							0b10 => ArithmeticShiftRightRegister(rm, rs),
							0b11 => RotateRightRegister(         rm, rs),

							_ => unsafe { unreachable_unchecked() },
						};
					},
				};
			},

			true => {
				let imm = (opcode & 0b00000000000000000000000011111111) as u8;
				let rot = (opcode & 0b00000000000000000000111100000000).wrapping_shr(0x7) as u8;

				return Immediate(imm, rot);
			},
		};
	}
}