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-rw-r--r--src/arm32/address/mod.rs1
-rw-r--r--src/arm32/condition/mod.rs6
-rw-r--r--src/arm32/instruction/mod.rs1
-rw-r--r--src/arm32/mod.rs4
-rw-r--r--src/arm32/register/mod.rs4
5 files changed, 16 insertions, 0 deletions
diff --git a/src/arm32/address/mod.rs b/src/arm32/address/mod.rs
index fa3488c..067cc20 100644
--- a/src/arm32/address/mod.rs
+++ b/src/arm32/address/mod.rs
@@ -23,6 +23,7 @@ use crate::arm32::Register;
use core::fmt::Display;
+/// An addressing mode.
pub enum Address {
ArithmeticShiftRightImmediate { source: Register, shift: u32 },
diff --git a/src/arm32/condition/mod.rs b/src/arm32/condition/mod.rs
index 5d595f9..f8d81ba 100644
--- a/src/arm32/condition/mod.rs
+++ b/src/arm32/condition/mod.rs
@@ -21,6 +21,12 @@
use core::fmt::Display;
+/// A condition code.
+///
+/// Most Arm32 instructions embed a condition code.
+///
+/// Any 4-bit values is always a valid condition code *except* `0b1111`, which sometimes denotes a different instruction altogether
+/// In most cases, it is invalid, however..
#[derive(Clone, Copy, Eq, Ord, PartialEq, PartialOrd)]
#[repr(u8)]
pub enum Condition {
diff --git a/src/arm32/instruction/mod.rs b/src/arm32/instruction/mod.rs
index d10aa6d..1e1971d 100644
--- a/src/arm32/instruction/mod.rs
+++ b/src/arm32/instruction/mod.rs
@@ -26,6 +26,7 @@ mod display;
use crate::arm32::Condition;
+/// An Arm32 instruction.
pub enum Instruction {
Branch { condition: Condition, immediate: i32 },
diff --git a/src/arm32/mod.rs b/src/arm32/mod.rs
index 6727a9c..e73980a 100644
--- a/src/arm32/mod.rs
+++ b/src/arm32/mod.rs
@@ -19,6 +19,10 @@
// fero General Public License along with Pollex.
// If not, see <https://www.gnu.org/licenses/>.
+//! Arm32-related facilities.
+//!
+//! This includes T variants of Arm32.
+
use crate::use_mod;
use_mod!(pub address);
use_mod!(pub condition);
diff --git a/src/arm32/register/mod.rs b/src/arm32/register/mod.rs
index bd8ba0d..366ab16 100644
--- a/src/arm32/register/mod.rs
+++ b/src/arm32/register/mod.rs
@@ -21,6 +21,10 @@
use core::fmt::Display;
+/// An Arm register.
+///
+/// Registers are number `R<N>`, where *N* denotes a decimal number from (0) to (15).
+/// Some registers have aliases, such as `r15|pc`.
#[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd)]
#[repr(u8)]
pub enum Register {