2 files changed, 189 insertions, 77 deletions
diff --git a/src/arm32/instruction/display.rs b/src/arm32/instruction/display.rs
index 93f5e32..f610782 100644
--- a/src/arm32/instruction/display.rs
+++ b/src/arm32/instruction/display.rs
@@ -19,7 +19,7 @@
 // fero General Public License along with Pollex.
 // If not, see <https://www.gnu.org/licenses/>.
 
-use crate::arm32::Instruction;
+use crate::arm32::{Flag, Instruction, Shifter};
 
 use core::fmt::Display;
 
@@ -28,80 +28,184 @@ impl Display for Instruction {
 use Instruction::*;
 
 match *self {
- Add { predicate, destination, base, source, s }
- => write!(f, "ADD{predicate}{s} {destination}, {base}, {source}"),
-
- AddCarry { predicate, destination, base, source, s }
- => write!(f, "ADC{predicate}{s} {destination}, {base}, {source}"),
-
- And { predicate, destination, base, source, s }
- => write!(f, "AND{predicate}{s} {destination}, {base}, {source}"),
-
- BitClear { predicate, destination, base, source, s }
- => write!(f, "BIC{predicate}{s} {destination}, {base}, {source}"),
-
- Branch { predicate, immediate }
- => write!(f, "B{predicate} <#{immediate}>"),
-
- BranchExchange { predicate, register }
- => write!(f, "BX{predicate} {register}"),
-
- BranchLink { predicate, immediate }
- => write!(f, "BL{predicate} <#{immediate}>"),
-
- Breakpoint { immediate }
- => write!(f, "BKPT #{immediate}"),
-
- CountLeadingZeroes { predicate, destination, source }
- => write!(f, "CLZ{predicate} {destination}, {source}"),
-
- Compare { predicate, lhs, rhs }
- => write!(f, "CMP{predicate} {lhs}, {rhs}"),
-
- CompareNegated { predicate, lhs, rhs }
- => write!(f, "CMN{predicate} {lhs}, {rhs}"),
-
- ExclusiveOr { predicate, destination, base, source, s }
- => write!(f, "EOR{predicate}{s} {destination}, {base}, {source}"),
-
- InclusiveOr { predicate, destination, base, source, s }
- => write!(f, "ORR{predicate}{s} {destination}, {base}, {source}"),
-
- Move { predicate, destination, source, s }
- => write!(f, "MOV{predicate}{s} {destination}, {source}"),
-
- MoveNot { predicate, destination, source, s }
- => write!(f, "MVN{predicate}{s} {destination}, {source}"),
-
- Multiply { predicate, destination, base, source, s }
- => write!(f, "MUL{predicate}{s} {destination}, {base}, {source}"),
-
- MultiplyAccumulate { predicate, destination, base, source, shift, s }
- => write!(f, "MLA{predicate}{s} {destination}, {base}, {source}, {shift}"),
-
- Reverse { predicate, destination, source }
- => write!(f, "REV{predicate} {destination}, {source}"),
-
- ReverseSubtract { predicate, destination, base, source, s }
- => write!(f, "RSB{predicate}{s} {destination}, {base}, {source}"),
-
- ReverseSubtractCarry { predicate, destination, base, source, s }
- => write!(f, "RSC{predicate}{s} {destination}, {base}, {source}"),
-
- SaturatingAdd { predicate, destination, base, source }
- => write!(f, "QADD{predicate} {destination}, {base}, {source}"),
-
- SaturatingSubtract { predicate, destination, base, source }
- => write!(f, "QSUB{predicate} {destination}, {base}, {source}"),
-
- SoftwareInterrupt { predicate, immediate }
- => write!(f, "SWI{predicate} #{immediate}"),
-
- Subtract { predicate, destination, base, source, s }
- => write!(f, "SUB{predicate}{s} {destination}, {base}, {source}"),
-
- SubtractCarry { predicate, destination, base, source, s }
- => write!(f, "SBC{predicate}{s} {destination}, {base}, {source}"),
+ Add {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "ADD{predicate}{s} {destination}, {base}, {source}"),
+
+ AddCarry {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "ADC{predicate}{s} {destination}, {base}, {source}"),
+
+ And {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "AND{predicate}{s} {destination}, {base}, {source}"),
+
+ BitClear {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "BIC{predicate}{s} {destination}, {base}, {source}"),
+
+ Branch {
+ predicate,
+ immediate,
+ } => write!(f, "B{predicate} <#{immediate}>"),
+
+ BranchExchange {
+ predicate,
+ register,
+ } => write!(f, "BX{predicate} {register}"),
+
+ BranchLink {
+ predicate,
+ immediate,
+ } => write!(f, "BL{predicate} <#{immediate}>"),
+
+ Breakpoint {
+ immediate } => write!(f, "BKPT #{immediate}"),
+
+ CountLeadingZeroes {
+ predicate,
+ destination,
+ source,
+ } => write!(f, "CLZ{predicate} {destination}, {source}"),
+
+ Compare {
+ predicate,
+ lhs,
+ rhs,
+ } => write!(f, "CMP{predicate} {lhs}, {rhs}"),
+
+ CompareNegated {
+ predicate,
+ lhs,
+ rhs,
+ } => write!(f, "CMN{predicate} {lhs}, {rhs}"),
+
+ ExclusiveOr {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "EOR{predicate}{s} {destination}, {base}, {source}"),
+
+ InclusiveOr {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "ORR{predicate}{s} {destination}, {base}, {source}"),
+
+ Move {
+ predicate,
+ destination,
+ source: Shifter::LogicalShiftLeftImmediate { source, shift: 0x0 },
+ s: Flag::Off,
+ } => write!(f, "CPY{predicate} {destination}, {source}"),
+
+ Move {
+ predicate,
+ destination,
+ source,
+ s,
+ } => write!(f, "MOV{predicate}{s} {destination}, {source}"),
+
+ MoveNot {
+ predicate,
+ destination,
+ source,
+ s,
+ } => write!(f, "MVN{predicate}{s} {destination}, {source}"),
+
+ Multiply {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "MUL{predicate}{s} {destination}, {base}, {source}"),
+
+ MultiplyAccumulate {
+ predicate,
+ destination,
+ base,
+ source,
+ shift,
+ s,
+ } => write!(f, "MLA{predicate}{s} {destination}, {base}, {source}, {shift}"),
+
+ Reverse {
+ predicate,
+ destination,
+ source,
+ } => write!(f, "REV{predicate} {destination}, {source}"),
+
+ ReverseSubtract {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "RSB{predicate}{s} {destination}, {base}, {source}"),
+
+ ReverseSubtractCarry {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "RSC{predicate}{s} {destination}, {base}, {source}"),
+
+ SaturatingAdd {
+ predicate,
+ destination,
+ base,
+ source,
+ } => write!(f, "QADD{predicate} {destination}, {base}, {source}"),
+
+ SaturatingSubtract {
+ predicate,
+ destination,
+ base,
+ source,
+ } => write!(f, "QSUB{predicate} {destination}, {base}, {source}"),
+
+ SoftwareInterrupt {
+ predicate,
+ immediate,
+ } => write!(f, "SWI{predicate} #{immediate}"),
+
+ Subtract {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "SUB{predicate}{s} {destination}, {base}, {source}"),
+
+ SubtractCarry {
+ predicate,
+ destination,
+ base,
+ source,
+ s,
+ } => write!(f, "SBC{predicate}{s} {destination}, {base}, {source}"),
 }
 }
 }
diff --git a/src/arm32/instruction/test.rs b/src/arm32/instruction/test.rs
index 6137795..d9067e9 100644
--- a/src/arm32/instruction/test.rs
+++ b/src/arm32/instruction/test.rs
@@ -52,7 +52,7 @@ fn test_arm32_instruction() {
 predicate: Predicate::Always,
 destination: Register::R7,
 base: Register::R8,
- source: Shifter::LogicalShiftLeftImmediate { source: Register::Sb, shift: 0x0 },
+ source: Shifter::LogicalShiftLeftImmediate { source: Register::R9, shift: 0x0 },
 s: Flag::On,
 },
 
@@ -64,6 +64,13 @@ fn test_arm32_instruction() {
 shift: Register::Lr,
 s: Flag::Off,
 },
+
+ Instruction::Move {
+ predicate: Predicate::NotEqual,
+ destination: Register::R0,
+ source: Shifter::LogicalShiftLeftImmediate { source: Register::Pc, shift: 0x0 },
+ s: Flag::Off,
+ },
 ];
 
 let mut displays = Vec::with_capacity(tree.len());
@@ -74,8 +81,9 @@ fn test_arm32_instruction() {
 [
 "ADDGE r1, r2, r3, ROR #2",
 "QSUBLT r4, r5, r6",
- "ORRS r7, r8, sb",
+ "ORRS r7, r8, r9",
 "MLAEQ r0, pc, pc, lr",
+ "CPYNE r0, pc"
 ],
 );
 }