1 files changed, 10 insertions, 2 deletions
diff --git a/src/arm32/instruction/test.rs b/src/arm32/instruction/test.rs
index 6137795..d9067e9 100644
--- a/src/arm32/instruction/test.rs
+++ b/src/arm32/instruction/test.rs
@@ -52,7 +52,7 @@ fn test_arm32_instruction() {
 predicate: Predicate::Always,
 destination: Register::R7,
 base: Register::R8,
- source: Shifter::LogicalShiftLeftImmediate { source: Register::Sb, shift: 0x0 },
+ source: Shifter::LogicalShiftLeftImmediate { source: Register::R9, shift: 0x0 },
 s: Flag::On,
 },
 
@@ -64,6 +64,13 @@ fn test_arm32_instruction() {
 shift: Register::Lr,
 s: Flag::Off,
 },
+
+ Instruction::Move {
+ predicate: Predicate::NotEqual,
+ destination: Register::R0,
+ source: Shifter::LogicalShiftLeftImmediate { source: Register::Pc, shift: 0x0 },
+ s: Flag::Off,
+ },
 ];
 
 let mut displays = Vec::with_capacity(tree.len());
@@ -74,8 +81,9 @@ fn test_arm32_instruction() {
 [
 "ADDGE r1, r2, r3, ROR #2",
 "QSUBLT r4, r5, r6",
- "ORRS r7, r8, sb",
+ "ORRS r7, r8, r9",
 "MLAEQ r0, pc, pc, lr",
+ "CPYNE r0, pc"
 ],
 );
 }