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bors e244e840f2 Auto merge of #84725 - sebpop:arm64-isb, r=joshtriplett
[Arm64] use isb instruction instead of yield in spin loops

On arm64 we have seen on several databases that ISB (instruction synchronization
barrier) is better to use than yield in a spin loop.  The yield instruction is a
nop.  The isb instruction puts the processor to sleep for some short time.  isb
is a good equivalent to the pause instruction on x86.

Below is an experiment that shows the effects of yield and isb on Arm64 and the
time of a pause instruction on x86 Intel processors.  The micro-benchmarks use
https://github.com/google/benchmark.git

```
$ cat a.cc
static void BM_scalar_increment(benchmark::State& state) {
  int i = 0;
  for (auto _ : state)
    benchmark::DoNotOptimize(i++);
}
BENCHMARK(BM_scalar_increment);
static void BM_yield(benchmark::State& state) {
  for (auto _ : state)
    asm volatile("yield"::);
}
BENCHMARK(BM_yield);
static void BM_isb(benchmark::State& state) {
  for (auto _ : state)
    asm volatile("isb"::);
}
BENCHMARK(BM_isb);
BENCHMARK_MAIN();

$ g++ -o run a.cc -O2 -lbenchmark -lpthread
$ ./run

--------------------------------------------------------------
Benchmark                    Time             CPU   Iterations
--------------------------------------------------------------

AWS Graviton2 (Neoverse-N1) processor:
BM_scalar_increment      0.485 ns        0.485 ns   1000000000
BM_yield                 0.400 ns        0.400 ns   1000000000
BM_isb                    13.2 ns         13.2 ns     52993304

AWS Graviton (A-72) processor:
BM_scalar_increment      0.897 ns        0.874 ns    801558633
BM_yield                 0.877 ns        0.875 ns    800002377
BM_isb                    13.0 ns         12.7 ns     55169412

Apple Arm64 M1 processor:
BM_scalar_increment      0.315 ns        0.315 ns   1000000000
BM_yield                 0.313 ns        0.313 ns   1000000000
BM_isb                    9.06 ns         9.06 ns     77259282
```

```
static void BM_pause(benchmark::State& state) {
  for (auto _ : state)
    asm volatile("pause"::);
}
BENCHMARK(BM_pause);

Intel Skylake processor:
BM_scalar_increment      0.295 ns        0.295 ns   1000000000
BM_pause                  41.7 ns         41.7 ns     16780553
```

Tested on Graviton2 aarch64-linux with `./x.py test`.
2021-05-02 04:54:31 +00:00
..
alloc Minor grammar tweaks for readability 2021-04-28 19:43:33 -07:00
backtrace@221483ebaf Update backtrace to 0.3.57 2021-04-25 13:48:03 -07:00
core Auto merge of #84725 - sebpop:arm64-isb, r=joshtriplett 2021-05-02 04:54:31 +00:00
panic_abort android: set abort message 2021-04-09 15:33:43 +02:00
panic_unwind Revert "Revert stabilizing integer::BITS." 2021-03-24 22:34:36 +01:00
proc_macro don't let const_fn feature flag affect impl-block-level trait bounds 2021-04-29 09:27:45 +02:00
profiler_builtins Update the minimum external LLVM to 10 2021-03-22 11:33:43 -07:00
rtstartup Bump bootstrap compiler to 1.50 beta 2020-12-30 09:27:19 -05:00
rustc-std-workspace-alloc
rustc-std-workspace-core Fix rustc-std-workspace-core documentation 2020-12-20 15:23:21 +08:00
rustc-std-workspace-std
std Auto merge of #84658 - Amanieu:reserved_regs, r=petrochenkov 2021-05-01 13:01:24 +00:00
stdarch@19f5459dd0 Update stdarch submodule (to before it switched to const generics) 2021-04-12 09:39:04 -04:00
term Allow/fix non_fmt_panic in tests. 2021-02-03 23:15:45 +01:00
test move core::hint::black_box under its own feature gate 2021-04-25 11:08:12 +02:00
unwind Rollup merge of #82374 - clehner:licenses, r=joshtriplett 2021-03-22 15:21:23 +01:00