ddc53f809b
Previously registers could only be marked as clobbered if the target feature for that register was enabled. This restriction is now removed. |
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| .. | ||
| src | ||
| Cargo.toml | ||
| README.md | ||
The codegen crate contains the code to convert from MIR into LLVM IR,
and then from LLVM IR into machine code. In general it contains code
that runs towards the end of the compilation process.
For more information about how codegen works, see the rustc dev guide.