rust/compiler/rustc_codegen_cranelift/src
bors a77322c16f Auto merge of #118310 - scottmcm:three-way-compare, r=davidtwco
Add `Ord::cmp` for primitives as a `BinOp` in MIR

Update: most of this OP was written months ago.  See https://github.com/rust-lang/rust/pull/118310#issuecomment-2016940014 below for where we got to recently that made it ready for review.

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There are dozens of reasonable ways to implement `Ord::cmp` for integers using comparison, bit-ops, and branches.  Those differences are irrelevant at the rust level, however, so we can make things better by adding `BinOp::Cmp` at the MIR level:

1. Exactly how to implement it is left up to the backends, so LLVM can use whatever pattern its optimizer best recognizes and cranelift can use whichever pattern codegens the fastest.
2. By not inlining those details for every use of `cmp`, we drastically reduce the amount of MIR generated for `derive`d `PartialOrd`, while also making it more amenable to MIR-level optimizations.

Having extremely careful `if` ordering to μoptimize resource usage on broadwell (#63767) is great, but it really feels to me like libcore is the wrong place to put that logic.  Similarly, using subtraction [tricks](https://graphics.stanford.edu/~seander/bithacks.html#CopyIntegerSign) (#105840) is arguably even nicer, but depends on the optimizer understanding it (https://github.com/llvm/llvm-project/issues/73417) to be practical.  Or maybe [bitor is better than add](https://discourse.llvm.org/t/representing-in-ir/67369/2?u=scottmcm)?  But maybe only on a future version that [has `or disjoint` support](https://discourse.llvm.org/t/rfc-add-or-disjoint-flag/75036?u=scottmcm)?  And just because one of those forms happens to be good for LLVM, there's no guarantee that it'd be the same form that GCC or Cranelift would rather see -- especially given their very different optimizers.  Not to mention that if LLVM gets a spaceship intrinsic -- [which it should](404250586) -- we'll need at least a rustc intrinsic to be able to call it.

As for simplifying it in Rust, we now regularly inline `{integer}::partial_cmp`, but it's quite a large amount of IR.  The best way to see that is with 8811efa88b (diff-d134c32d028fbe2bf835fef2df9aca9d13332dd82284ff21ee7ebf717bfa4765R113) -- I added a new pre-codegen MIR test for a simple 3-tuple struct, and this PR change it from 36 locals and 26 basic blocks down to 24 locals and 8 basic blocks.  Even better, as soon as the construct-`Some`-then-match-it-in-same-BB noise is cleaned up, this'll expose the `Cmp == 0` branches clearly in MIR, so that an InstCombine (#105808) can simplify that to just a `BinOp::Eq` and thus fix some of our generated code perf issues.  (Tracking that through today's `if a < b { Less } else if a == b { Equal } else { Greater }` would be *much* harder.)

---

r? `@ghost`
But first I should check that perf is ok with this
~~...and my true nemesis, tidy.~~
2024-04-02 19:21:44 +00:00
..
abi Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
debuginfo Replace Session should_remap_filepaths with filename_display_preference 2024-03-28 18:47:26 +01:00
driver Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
intrinsics Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
optimize Merge commit '598f090956' into sync_cg_clif-2023-01-24 2023-01-24 18:56:42 +01:00
allocator.rs Merge commit '81dc066758' into sync_cg_clif-2023-10-09 2023-10-09 08:52:46 +00:00
analyze.rs remove redundant imports 2023-12-10 10:56:22 +08:00
archive.rs remove useless lifetime of ArchiveBuilder 2024-02-26 22:37:04 +08:00
base.rs Auto merge of #122671 - Mark-Simulacrum:const-panic-msg, r=Nilstrieb 2024-03-29 00:24:01 +00:00
cast.rs Merge commit '93a5433f17' into sync_cg_clif-2023-10-24 2023-10-24 12:22:23 +00:00
codegen_i128.rs Add+Use mir::BinOp::Cmp 2024-03-23 23:23:41 -07:00
common.rs Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
compiler_builtins.rs Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15 2023-03-15 14:41:48 +00:00
concurrency_limiter.rs Rename many DiagCtxt arguments. 2023-12-18 16:06:22 +11:00
config.rs Merge commit '8830dccd1d' into sync_cg_clif-2023-06-15 2023-06-15 17:56:01 +00:00
constant.rs Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
discriminant.rs Remove from cranelift too. 2023-04-14 16:26:11 +00:00
global_asm.rs Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
inline_asm.rs Implement asm goto in MIR and MIR lowering 2024-02-24 18:50:09 +00:00
lib.rs Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00
linkage.rs Sync rustc_codegen_cranelift 'ddd4ce2553' 2021-04-30 14:49:58 +02:00
main_shim.rs use Instance::expect_resolve() instead of unwraping Instance::resolve() 2024-03-10 11:49:33 +01:00
num.rs Add+Use mir::BinOp::Cmp 2024-03-23 23:23:41 -07:00
pointer.rs Merge commit '81dc066758' into sync_cg_clif-2023-10-09 2023-10-09 08:52:46 +00:00
pretty_clif.rs Rename EarlyErrorHandler as EarlyDiagCtxt. 2023-12-18 16:06:21 +11:00
toolchain.rs Merge commit 'e9d1a0a7b0' into sync_cg_clif-2022-08-24 2022-08-24 18:40:58 +02:00
trap.rs Merge commit '8830dccd1d' into sync_cg_clif-2023-06-15 2023-06-15 17:56:01 +00:00
unsize.rs Programmatically convert some of the pat ctors 2024-03-22 11:13:29 -04:00
value_and_place.rs Programmatically convert some of the pat ctors 2024-03-22 11:13:29 -04:00
vtable.rs Merge commit '09fae60a86' into sync_cg_clif-2024-03-28 2024-03-28 11:43:35 +00:00