rust/compiler/rustc_codegen_cranelift/src
bors 48b36c9d59 Auto merge of #128320 - saethlin:link-me-maybe, r=compiler-errors
Avoid no-op unlink+link dances in incr comp

Incremental compilation scales quite poorly with the number of CGUs. This PR improves one reason for that.

The incr comp process hard-links all the files from an old session into a new one, then it runs the backend, which may just hard-link the new session files into the output directory. Then codegen hard-links all the output files back to the new session directory.

This PR (perhaps unimaginatively) fixes the silliness that ensues in the last step. The old `link_or_copy` implementation would be passed pairs of paths which are already the same inode, then it would blindly delete the destination and re-create the hard-link that it just deleted. This PR lets us skip both those operations. We don't skip the other two hard-links.

`cargo +stage1 b && touch crates/core/main.rs && strace -cfw -elink,linkat,unlink,unlinkat cargo +stage1 b` before and then after on `ripgrep-13.0.0`:
```
% time     seconds  usecs/call     calls    errors syscall
------ ----------- ----------- --------- --------- ----------------
 52.56    0.024950          25       978       485 unlink
 34.38    0.016318          22       727           linkat
 13.06    0.006200          24       249           unlinkat
------ ----------- ----------- --------- --------- ----------------
100.00    0.047467          24      1954       485 total
```
```
% time     seconds  usecs/call     calls    errors syscall
------ ----------- ----------- --------- --------- ----------------
 42.83    0.014521          57       252           unlink
 38.41    0.013021          26       486           linkat
 18.77    0.006362          25       249           unlinkat
------ ----------- ----------- --------- --------- ----------------
100.00    0.033904          34       987           total
```

This reduces the number of hard-links that are causing perf troubles, noted in https://github.com/rust-lang/rust/issues/64291 and https://github.com/rust-lang/rust/issues/137560
2025-03-21 21:03:49 +00:00
..
abi rename BackendRepr::Vector → SimdVector 2025-02-28 17:17:45 +01:00
debuginfo Merge commit '557ed8ebb7' into sync_cg_clif-2025-02-15 2025-02-15 14:13:01 +00:00
driver Fill out links_from_incr_cache in cg_clif 2025-02-26 20:02:03 -05:00
intrinsics atomic intrinsics: clarify which types are supported and (if applicable) what happens with provenance 2025-03-13 08:14:34 +01:00
optimize Reformat use declarations. 2024-07-29 08:26:52 +10:00
allocator.rs Remove implicit #[no_mangle] for #[rustc_std_internal_symbol] 2025-03-17 14:08:09 +00:00
analyze.rs rename AddressOf -> RawBorrow inside the compiler 2024-08-18 19:46:53 +02:00
base.rs Extend the renaming to coerce_unsafe_ptr 2025-02-10 13:01:55 +00:00
cast.rs Rustfmt 2025-02-08 22:12:13 +00:00
codegen_i128.rs Windows x86: Change i128 to return via the vector ABI 2025-01-27 12:12:59 +00:00
common.rs Merge commit '557ed8ebb7' into sync_cg_clif-2025-02-15 2025-02-15 14:13:01 +00:00
compiler_builtins.rs Merge commit '8332329f83' into sync_cg_clif-2025-02-07 2025-02-07 20:58:27 +00:00
concurrency_limiter.rs Remove jobserver from Session 2024-12-13 10:21:22 +00:00
config.rs Merge commit '57845a397e' into sync_cg_clif-2024-12-06 2024-12-06 12:10:30 +00:00
constant.rs cg_clif: use exclusively ABI alignment 2025-02-17 15:10:51 -08:00
discriminant.rs make no-variant types a dedicated Variants variant 2024-12-18 11:01:54 +01:00
global_asm.rs Make a fake body to store typeck results for global_asm 2025-02-22 00:12:07 +00:00
inline_asm.rs Merge commit '557ed8ebb7' into sync_cg_clif-2025-02-15 2025-02-15 14:13:01 +00:00
lib.rs Remove implicit #[no_mangle] for #[rustc_std_internal_symbol] 2025-03-17 14:08:09 +00:00
linkage.rs Sync rustc_codegen_cranelift 'ddd4ce2553' 2021-04-30 14:49:58 +02:00
main_shim.rs Rustfmt 2025-02-08 22:12:13 +00:00
num.rs Merge commit 'e39eacd2d4' into sync_cg_clif-2025-01-10 2025-01-10 09:02:07 +00:00
pointer.rs Merge commit '1fa693ca44' into sync_cg_clif-2024-11-09 2024-11-09 13:48:06 +00:00
pretty_clif.rs Merge commit '1fa693ca44' into sync_cg_clif-2024-11-09 2024-11-09 13:48:06 +00:00
toolchain.rs Merge commit 'e9d1a0a7b0' into sync_cg_clif-2022-08-24 2022-08-24 18:40:58 +02:00
trap.rs Rustfmt 2025-02-08 22:12:13 +00:00
unsize.rs Use ExistentialTraitRef throughout codegen 2025-01-30 15:34:00 +00:00
unwind_module.rs Merge commit '49cd5dd454' into sync_cg_clif-2024-06-30 2024-06-30 11:28:14 +00:00
value_and_place.rs rename BackendRepr::Vector → SimdVector 2025-02-28 17:17:45 +01:00
vtable.rs Extend the renaming to coerce_unsafe_ptr 2025-02-10 13:01:55 +00:00