20432c9eee
Some tests expect to be compiled for a specific CPU or require certain target features to be present (or absent). These tests work fine with default CPUs but fail in downstream builds for RHEL and Fedora, where we use non-default CPUs such as z13 on s390x, pwr9 on ppc64le, or x86-64-v2/x86-64-v3 on x86_64.
156 lines
4.4 KiB
Rust
156 lines
4.4 KiB
Rust
//@ add-core-stubs
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//@ revisions: elfv1-be elfv2-be elfv2-le aix
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//@ assembly-output: emit-asm
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//@ compile-flags: -Copt-level=3
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//@[elfv1-be] compile-flags: --target powerpc64-unknown-linux-gnu
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//@[elfv1-be] needs-llvm-components: powerpc
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//@[elfv2-be] compile-flags: --target powerpc64-unknown-linux-musl
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//@[elfv2-be] needs-llvm-components: powerpc
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//@[elfv2-le] compile-flags: --target powerpc64le-unknown-linux-gnu -C target-cpu=pwr8
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//@[elfv2-le] needs-llvm-components: powerpc
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//@[aix] compile-flags: --target powerpc64-ibm-aix
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//@[aix] needs-llvm-components: powerpc
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//@[elfv1-be] filecheck-flags: --check-prefix be
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//@[elfv2-be] filecheck-flags: --check-prefix be
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//@[elfv1-be] filecheck-flags: --check-prefix elf
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//@[elfv2-be] filecheck-flags: --check-prefix elf
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//@[elfv2-le] filecheck-flags: --check-prefix elf
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#![feature(no_core, lang_items)]
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#![no_std]
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#![no_core]
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#![crate_type = "lib"]
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extern crate minicore;
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use minicore::*;
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impl Copy for FiveU32s {}
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impl Copy for FiveU16s {}
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impl Copy for ThreeU8s {}
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#[repr(C)]
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struct FiveU32s(u32, u32, u32, u32, u32);
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#[repr(C)]
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struct FiveU16s(u16, u16, u16, u16, u16);
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#[repr(C)]
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struct ThreeU8s(u8, u8, u8);
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// CHECK-LABEL: read_large
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// aix: lwz [[REG1:.*]], 16(4)
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// aix-NEXT: lxv{{d2x|w4x}} 0, 0, 4
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// aix-NEXT: stw [[REG1]], 16(3)
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// aix-NEXT: stxv{{d2x|w4x}} 0, 0, 3
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// be: lwz [[REG1:.*]], 16(4)
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// be-NEXT: stw [[REG1]], 16(3)
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// be-NEXT: ld [[REG2:.*]], 8(4)
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// be-NEXT: ld [[REG3:.*]], 0(4)
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// be-NEXT: std [[REG2]], 8(3)
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// be-NEXT: std [[REG3]], 0(3)
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// elfv2-le: lxvd2x [[REG1:.*]], 0, 4
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// elfv2-le-NEXT: lwz [[REG2:.*]], 16(4)
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// elfv2-le-NEXT: stw [[REG2]], 16(3)
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// elfv2-le-NEXT: stxvd2x [[REG1]], 0, 3
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn read_large(x: &FiveU32s) -> FiveU32s {
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*x
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}
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// CHECK-LABEL: read_medium
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// aix: lhz [[REG1:.*]], 8(4)
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// aix-NEXT: ld [[REG2:.*]], 0(4)
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// aix-NEXT: sth [[REG1]], 8(3)
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// aix-NEXT: std [[REG2]], 0(3)
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// elfv1-be: lhz [[REG1:.*]], 8(4)
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// elfv1-be-NEXT: ld [[REG2:.*]], 0(4)
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// elfv1-be-NEXT: sth [[REG1]], 8(3)
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// elfv1-be-NEXT: std [[REG2]], 0(3)
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// elfv2-be: lhz [[REG1:.*]], 8(3)
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// elfv2-be-NEXT: ld 3, 0(3)
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// elfv2-be-NEXT: sldi 4, [[REG1]], 48
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// elfv2-le: ld [[REG1:.*]], 0(3)
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// elfv2-le-NEXT: lhz 4, 8(3)
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// elfv2-le-NEXT: mr 3, [[REG1]]
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn read_medium(x: &FiveU16s) -> FiveU16s {
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*x
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}
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// CHECK-LABEL: read_small
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// aix: lbz [[REG1:.*]], 2(4)
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// aix-NEXT: lhz [[REG2:.*]], 0(4)
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// aix-NEXT: stb [[REG1]], 2(3)
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// aix-NEXT: sth [[REG2]], 0(3)
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// elfv1-be: lbz [[REG1:.*]], 2(4)
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// elfv1-be-NEXT: lhz [[REG2:.*]], 0(4)
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// elfv1-be-NEXT: stb [[REG1]], 2(3)
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// elfv1-be-NEXT: sth [[REG2]], 0(3)
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// elfv2-be: lhz [[REG1:.*]], 0(3)
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// elfv2-be-NEXT: lbz 3, 2(3)
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// elfv2-be-NEXT: rldimi 3, [[REG1]], 8, 0
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// elfv2-le: lbz [[REG1:.*]], 2(3)
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// elfv2-le-NEXT: lhz 3, 0(3)
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// elfv2-le-NEXT: rldimi 3, [[REG1]], 16, 0
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn read_small(x: &ThreeU8s) -> ThreeU8s {
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*x
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}
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// CHECK-LABEL: write_large
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// aix: std 3, 48(1)
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// aix-NEXT: rldicl [[REG1:.*]], 5, 32, 32
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// aix-NEXT: std 5, 64(1)
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// aix-NEXT: std 4, 56(1)
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// aix-NEXT: stw [[REG1]], 16(6)
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// aix-NEXT: addi [[REG2:.*]], 1, 48
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// aix-NEXT: lxv{{d2x|w4x}} 0, 0, [[REG2]]
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// aix-NEXT: stxv{{d2x|w4x}} 0, 0, 6
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// elf: std 3, 0(6)
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// be-NEXT: rldicl [[REG1:.*]], 5, 32, 32
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// elf-NEXT: std 4, 8(6)
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// be-NEXT: stw [[REG1]], 16(6)
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// elfv2-le-NEXT: stw 5, 16(6)
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn write_large(x: FiveU32s, dest: &mut FiveU32s) {
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*dest = x;
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}
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// CHECK-LABEL: write_medium
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// aix: std 4, 56(1)
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// aix-NEXT: rldicl [[REG1:.*]], 4, 16, 48
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// aix-NEXT: std 3, 48(1)
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// aix-NEXT: std 3, 0(5)
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// aix-NEXT: sth [[REG1]], 8(5)
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// elf: std 3, 0(5)
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// be-NEXT: rldicl [[REG1:.*]], 4, 16, 48
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// be-NEXT: sth [[REG1]], 8(5)
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// elfv2-le-NEXT: sth 4, 8(5)
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn write_medium(x: FiveU16s, dest: &mut FiveU16s) {
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*dest = x;
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}
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// CHECK-LABEL: write_small
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// aix: std 3, 48(1)
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// aix-NEXT: rldicl [[REG1:.*]], 3, 16, 48
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// aix-NEXT: sth 3, 0(4)
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// aix-NEXT: lbz 3, 50(1)
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// aix-NEXT: stb [[REG1]], 2(4)
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// be: stb 3, 2(4)
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// be-NEXT: srwi [[REG1:.*]], 3, 8
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// be-NEXT: sth [[REG1]], 0(4)
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// The order these instructions are emitted in changed in LLVM 18.
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// elfv2-le-DAG: sth 3, 0(4)
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// elfv2-le-DAG: srwi [[REG1:.*]], 3, 16
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// elfv2-le-NEXT: stb [[REG1]], 2(4)
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// CHECK-NEXT: blr
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#[no_mangle]
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extern "C" fn write_small(x: ThreeU8s, dest: &mut ThreeU8s) {
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*dest = x;
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}
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