3 commits

Author	SHA1	Message	Date
DianQK	910674f1c4	Only check for successful vectorization on wider_reduce_into_iter ... Different vectorization results are due to different LLVM versions.	2023-09-24 09:49:39 +08:00
DianQK	d30f210e5d	Increasing the SIMD size improves the vectorization possibilities ... Change the simd-wide-sum.rs to pass the LLVM main branching test.	2023-09-21 12:36:12 +08:00
Jubilee Young	45c284cd98	tests/codegen/*simd*.rs -> simd/*simd*	2023-07-29 18:34:41 -07:00