Commit graph

197 commits

Author SHA1 Message Date
Ralf Jung
93ee180cfa ABI-required target features: warn when they are missing in base CPU (rather than silently enabling them) 2025-01-28 04:40:42 +01:00
Jacob Pratt
4e4a93c2dd
Rollup merge of #131830 - hoodmane:emscripten-wasm-eh, r=workingjubilee
Add support for wasm exception handling to Emscripten target

This is a draft because we need some additional setting for the Emscripten target to select between the old exception handling and the new exception handling. I don't know how to add a setting like that, would appreciate advice from Rust folks. We could maybe choose to use the new exception handling if `Ctarget-feature=+exception-handling` is passed? I tried this but I get errors from llvm so I'm not doing it right.
2025-01-06 22:04:13 -05:00
Hood Chatham
49c74234a7 Add support for wasm exception handling to Emscripten target
Gated behind an unstable `-Z emscripten-wasm-eh` flag
2025-01-06 10:29:54 +01:00
Ralf Jung
2e64b5352b add dedicated type for ABI target feature constraints 2025-01-05 10:46:30 +01:00
Ralf Jung
912b7291d0 add ABI target features *before* -Ctarget-features 2024-12-31 12:41:20 +01:00
Ralf Jung
eb527424a5 x86-64 hardfloat actually requires sse2 2024-12-31 12:41:20 +01:00
Ralf Jung
cfae43d638 clean up target feature system; most of the toggleability is now handled by the ABI target feature check 2024-12-31 12:41:20 +01:00
Ralf Jung
2bf27e09be explicitly model that certain ABIs require/forbid certain target features 2024-12-31 12:41:20 +01:00
Nicholas Nethercote
2620eb42d7 Re-export more rustc_span::symbol things from rustc_span.
`rustc_span::symbol` defines some things that are re-exported from
`rustc_span`, such as `Symbol` and `sym`. But it doesn't re-export some
closely related things such as `Ident` and `kw`. So you can do `use
rustc_span::{Symbol, sym}` but you have to do `use
rustc_span::symbol::{Ident, kw}`, which is inconsistent for no good
reason.

This commit re-exports `Ident`, `kw`, and `MacroRulesNormalizedIdent`,
and changes many `rustc_span::symbol::` qualifiers in `compiler/` to
`rustc_span::`. This is a 200+ net line of code reduction, mostly
because many files with two `use rustc_span` items can be reduced to
one.
2024-12-18 13:38:53 +11:00
Ralf Jung
eb2e928250 target_features: control separately whether enabling and disabling a target feature is allowed 2024-12-14 08:24:18 +01:00
Ralf Jung
60eca2c575 apply review feedback 2024-12-11 22:18:51 +01:00
Ralf Jung
2d887a5c5c generalize 'forbidden feature' concept so that even (un)stable feature can be invalid to toggle
Also rename some things for extra clarity
2024-12-11 22:11:15 +01:00
Sayantan Chakraborty
1220f393cc
Add the power8-crypto target feature 2024-12-09 00:41:35 +05:30
Ralf Jung
2c7f3badcf target_features: explain what exacty 'implied' means here 2024-11-11 07:33:39 +01:00
Taiki Endo
c059eb7750 Add v8plus target feature to sparc and use it in create_object_file 2024-11-09 03:22:09 +09:00
Taiki Endo
400a690b5f Add v9 and leoncasa target feature to sparc 2024-11-09 03:17:24 +09:00
Matthias Krüger
088e698835
Rollup merge of #132077 - alexcrichton:wide-arithmetic, r=jieyouxu
Add a new `wide-arithmetic` feature for WebAssembly

This commit adds a new rustc target feature named `wide-arithmetic` for WebAssembly targets. This corresponds to the [wide-arithmetic] proposal for WebAssembly which adds new instructions catered towards accelerating integer arithmetic larger than 64-bits. This proposal to WebAssembly is not standard yet so this new feature is flagged as an unstable target feature. Additionally Rust's LLVM version doesn't support this new feature yet since support will first be added in LLVM 20, so the feature filtering logic for LLVM is updated to handle this.

I'll also note that I'm not currently planning to add wasm-specific intrinsics to `std::arch::wasm32` at this time. The currently proposed instructions are all accessible through `i128` or `u128`-based operations which Rust already supports, so intrinsic shouldn't be necessary to get access to these new instructions.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic
2024-11-05 23:43:57 +01:00
bors
e8c698bb3b Auto merge of #129884 - RalfJung:forbidden-target-features, r=workingjubilee
mark some target features as 'forbidden' so they cannot be (un)set with -Ctarget-feature

The context for this is https://github.com/rust-lang/rust/issues/116344: some target features change the way floats are passed between functions. Changing those target features is unsound as code compiled for the same target may now use different ABIs.

So this introduces a new concept of "forbidden" target features (on top of the existing "stable " and "unstable" categories), and makes it a hard error to (un)set such a target feature. For now, the x86 and ARM feature `soft-float` is on that list. We'll have to make some effort to collect more relevant features, and similar features from other targets, but that can happen after the basic infrastructure for this landed. (These features are being collected in https://github.com/rust-lang/rust/issues/131799.)

I've made this a warning for now to give people some time to speak up if this would break something.

MCP: https://github.com/rust-lang/compiler-team/issues/780
2024-11-05 16:25:45 +00:00
Ralf Jung
ffad9aac27 mark some target features as 'forbidden' so they cannot be (un)set
For now, this is just a warning, but should become a hard error in the future
2024-11-04 22:56:47 +01:00
Zalathar
90f2075b66 Port most of LLVMRustPrintTargetCPUs to Rust 2024-11-02 23:39:29 +11:00
Zalathar
0fa86f9660 Use a dedicated safe wrapper for LLVMRustGetHostCPUName 2024-11-02 23:39:29 +11:00
Alex Crichton
f534974037 Add a new wide-arithmetic feature for WebAssembly
This commit adds a new rustc target feature named `wide-arithmetic` for
WebAssembly targets. This corresponds to the [wide-arithmetic] proposal
for WebAssembly which adds new instructions catered towards accelerating
integer arithmetic larger than 64-bits. This proposal to WebAssembly is
not standard yet so this new feature is flagged as an unstable target
feature. Additionally Rust's LLVM version doesn't support this new
feature yet since support will first be added in LLVM 20, so the
feature filtering logic for LLVM is updated to handle this.

I'll also note that I'm not currently planning to add wasm-specific
intrinsics to `std::arch::wasm32` at this time. The currently proposed
instructions are all accessible through `i128` or `u128`-based
operations which Rust already supports, so intrinsic shouldn't be
necessary to get access to these new instructions.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic
2024-10-28 08:11:47 -07:00
ChrisCho-H
82bfe05309 refactor: cleaner check to return None 2024-10-28 20:16:35 +09:00
Kajetan Puchalski
f641c32aad rustc_target: Add pauth-lr aarch64 target feature
Add the pauth-lr target feature, corresponding to aarch64 FEAT_PAuth_LR.
This feature has been added in LLVM 19.
It is currently not supported by the Linux hwcap and so we cannot add
runtime feature detection for it at this time.
2024-10-16 18:00:51 +01:00
Matthias Krüger
edb669350a
Rollup merge of #130741 - mrkajetanp:detect-b16b16, r=Amanieu
rustc_target: Add sme-b16b16 as an explicit aarch64 target feature

LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.

Resolves https://github.com/rust-lang/rust/pull/129894.
2024-10-10 22:00:48 +02:00
Matthias Krüger
13976f1f25
Rollup merge of #130308 - davidtwco:tied-target-consolidation, r=wesleywiser
codegen_ssa: consolidate tied target checks

Fixes #105110.
Fixes #105111.

`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for checking if tied target features were partially enabled. This PR consolidates these checks into `rustc_codegen_ssa` in the `codegen_fn_attrs` query, which also is run pre-monomorphisation for each function, which ensures that this check is run for unused functions, as would be expected.

Also adds a test confirming that enabling one tied feature doesn't imply another - the appropriate error for this was already being emitted. I did a bisect and narrowed it down to two patches it was likely to be - something in #128796, probably #128221 or #128679.
2024-10-10 22:00:45 +02:00
Kajetan Puchalski
335f67b652 rustc_target: Add sme-b16b16 as an explicit aarch64 target feature
LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.
2024-10-10 10:24:57 +00:00
Trevor Gross
acaa6cee07
Rollup merge of #130877 - taiki-e:riscv-atomic, r=Amanieu
rustc_target: Add RISC-V atomic-related features

This adds the following three target features to unstable riscv_target_feature.

- `zaamo` (Zaamo Extension 1.0.0): Atomic Memory Operations (`amo*.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L229-L231), [available since LLVM 19](8be079cddd))
- `zabha` (Zabha Extension 1.0.0): Byte and Halfword Atomic Memory Operations (`amo*.{b,h}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L238-L240), [available since LLVM 19](6b7444964a))
- `zalrsc` (Zalrsc Extension 1.0.0): Load-Reserved/Store-Conditional Instructions (`lr.{w,d}{,.aq,.rl,.aqrl}` and `sc.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L261-L263), [available since LLVM 19](8be079cddd))

(Zacas Extension is not included here because it is still marked as experimental in LLVM 19 70e7d26e56 and will become non-experimental in LLVM 20 614aeda93b)

`a` implies `zaamo` and `zalrsc`, and `zabha` implies `zaamo`:

- After Zaamo and Zalrsc Extensions are frozen, riscv-isa-manual says "The A extension comprises instructions provided by the Zaamo and Zalrsc extensions" (e87412e621), and [`a` implies `zaamo` and `zalrsc` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L44)). However, in LLVM, [`a` does not define them as implying `zaamo` and `zalrsc`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L206).
- Zabha and Zaamo are in a similar situation, [riscv-isa-manual](https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc) says "The Zabha extension depends upon the Zaamo standard extension", and [`zabha` implies `zaamo` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L45-L46)), but [does not in LLVM (but enabling `zabha` without `zaamo` or `a` is not allowed)](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/TargetParser/RISCVISAInfo.cpp#L776-L778).

r? `@Amanieu`

`@rustbot` label +O-riscv +A-target-feature
2024-09-30 19:18:49 -04:00
Ralf Jung
a78fd694d4 extend comment in global_llvm_features regarding target-cpu=native handling 2024-09-29 12:16:35 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Josh Stone
4160a54dc5 Use &raw in the compiler
Like #130865 did for the standard library, we can use `&raw` in the
compiler now that stage0 supports it. Also like the other issue, I did
not make any doc or test changes at this time.
2024-09-26 20:33:26 -07:00
David Wood
207bc77e15
codegen_ssa: consolidate tied feature checking
`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for
checking if tied target features were partially enabled. This commit
consolidates these checks into `rustc_codegen_ssa` in the
`codegen_fn_attrs` query, which also is run pre-monomorphisation for
each function, which ensures that this check is run for unused functions,
as would be expected.
2024-09-24 15:48:49 +01:00
Michael Goulet
c682aa162b Reformat using the new identifier sorting from rustfmt 2024-09-22 19:11:29 -04:00
Nicholas Nethercote
1f359405cb Reformat some comments.
So they are less than 100 chars.
2024-09-19 20:11:28 +10:00
Josh Stone
6fd8a50680 Update the minimum external LLVM to 18 2024-09-18 13:53:31 -07:00
bors
1f51450c68 Auto merge of #117465 - paulmenage:small-data-limit, r=compiler-errors
Add -Z small-data-threshold

This flag allows specifying the threshold size above which LLVM should not consider placing small objects in a `.sdata` or `.sbss` section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-12 04:27:08 +00:00
Paul Menage
3810386bbe Add -Z small-data-threshold
This flag allows specifying the threshold size above which LLVM should
not consider placing small objects in a .sdata or .sbss section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-10 12:19:16 -07:00
Eduardo Sánchez Muñoz
0b20ffcb63 Remove needless returns detected by clippy in the compiler 2024-09-09 13:32:22 +02:00
liushuyu
e98e88bfdf rustc_codegen_llvm: fix a regression where backchain feature ...
... can not be correctly gated using #[cfg] macro
2024-09-03 12:42:57 -06:00
Kajetan Puchalski
3a0fbb5d4e rustc_codegen_llvm: Filter out unavailable LLVM features
Convert to_llvm_features to return Option<LLVMFeature> so that it can
return None if the requested feature is not available for the current
LLVM version.

Add match rules to filter out aarch64 features not available in LLVM 17.
2024-08-27 11:13:01 +01:00
Kajetan Puchalski
4f847bd326 rustc_target: Add various aarch64 features
Add various aarch64 features already supported by LLVM and Linux.

The features are marked as unstable using a newly added symbol, i.e.
aarch64_unstable_target_feature.

Additionally include some comment fixes to ensure consistency of
feature names with the Arm ARM and support for architecture version
target features up to v9.5a.

This commit adds compiler support for the following features:

- FEAT_CSSC
- FEAT_ECV
- FEAT_FAMINMAX
- FEAT_FLAGM2
- FEAT_FP8
- FEAT_FP8DOT2
- FEAT_FP8DOT4
- FEAT_FP8FMA
- FEAT_FPMR
- FEAT_HBC
- FEAT_LSE128
- FEAT_LSE2
- FEAT_LUT
- FEAT_MOPS
- FEAT_LRCPC3
- FEAT_SVE_B16B16
- FEAT_SVE2p1
- FEAT_WFxT
2024-08-27 11:11:47 +01:00
Nicholas Nethercote
61627438eb Add warn(unreachable_pub) to rustc_codegen_llvm. 2024-08-16 08:46:57 +10:00
Caleb Zulawski
8818c95528 Disallow enabling features without their implied features 2024-08-07 00:45:00 -04:00
Caleb Zulawski
6b96a60611 Add implied features to non-target-feature functions 2024-08-07 00:41:48 -04:00
Caleb Zulawski
5006711744 Remove redundant implied features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
a25da077cf Don't use LLVM to compute -Ctarget-feature 2024-08-07 00:41:48 -04:00
Caleb Zulawski
484aca8857 Don't use LLVM's target features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
fbd618d4aa Refactor and fill out target feature lists 2024-08-07 00:41:48 -04:00
Caleb Zulawski
74653b61a6 Add implied target features to target_feature attribute 2024-08-07 00:41:48 -04:00
daxpedda
80b74d397f
Implement a implicit target feature mechanism 2024-08-04 08:44:23 +02:00