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Rollup merge of #131208 - mustartt:aix-call-abi, r=davidtwco

ABI: Pass aggregates by value on AIX

On AIX we pass aggregates byval. Adds new ABI for AIX for powerpc64.

313ad85dfa/clang/lib/CodeGen/Targets/PPC.cpp (L216)

Fixes the following 2 testcases on AIX:
```
tests/ui/abi/extern/extern-pass-TwoU16s.rs
tests/ui/abi/extern/extern-pass-TwoU8s.rs
```
This commit is contained in:
Matthias Krüger 2024-10-11 15:36:51 +02:00 committed by GitHub
commit fc81a7c1d5
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2 changed files with 52 additions and 7 deletions

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@ -10,6 +10,7 @@ use crate::spec::HasTargetSpec;
enum ABI {
ELFv1, // original ABI used for powerpc64 (big-endian)
ELFv2, // newer ABI used for powerpc64le and musl (both endians)
AIX, // used by AIX OS, big-endian only
}
use ABI::*;
@ -23,9 +24,9 @@ where
C: HasDataLayout,
{
arg.layout.homogeneous_aggregate(cx).ok().and_then(|ha| ha.unit()).and_then(|unit| {
// ELFv1 only passes one-member aggregates transparently.
// ELFv1 and AIX only passes one-member aggregates transparently.
// ELFv2 passes up to eight uniquely addressable members.
if (abi == ELFv1 && arg.layout.size > unit.size)
if ((abi == ELFv1 || abi == AIX) && arg.layout.size > unit.size)
|| arg.layout.size > unit.size.checked_mul(8, cx).unwrap()
{
return None;
@ -55,8 +56,15 @@ where
return;
}
// The AIX ABI expect byval for aggregates
// See https://github.com/llvm/llvm-project/blob/main/clang/lib/CodeGen/Targets/PPC.cpp.
if !is_ret && abi == AIX {
arg.pass_by_stack_offset(None);
return;
}
// The ELFv1 ABI doesn't return aggregates in registers
if is_ret && abi == ELFv1 {
if is_ret && (abi == ELFv1 || abi == AIX) {
arg.make_indirect();
return;
}
@ -93,6 +101,8 @@ where
{
let abi = if cx.target_spec().env == "musl" {
ELFv2
} else if cx.target_spec().os == "aix" {
AIX
} else {
match cx.data_layout().endian {
Endian::Big => ELFv1,