Implement simd_insert
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0b211be054
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edc0a3470b
2 changed files with 21 additions and 8 deletions
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@ -146,6 +146,7 @@ unsafe fn test_simd() {
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// FIXME(#666) implement `#[rustc_arg_required_const(..)]` support
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// FIXME(#666) implement `#[rustc_arg_required_const(..)]` support
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//test_mm_extract_epi8();
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//test_mm_extract_epi8();
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//test_mm_insert_epi16();
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let mask1 = _mm_movemask_epi8(dbg!(_mm_setr_epi8(255u8 as i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)));
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let mask1 = _mm_movemask_epi8(dbg!(_mm_setr_epi8(255u8 as i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)));
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assert_eq!(mask1, 1);
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assert_eq!(mask1, 1);
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@ -279,6 +280,14 @@ unsafe fn test_mm_extract_epi8() {
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assert_eq!(r2, 3);
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assert_eq!(r2, 3);
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}
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}
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#[target_feature(enable = "sse2")]
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unsafe fn test_mm_insert_epi16() {
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let a = _mm_setr_epi16(0, 1, 2, 3, 4, 5, 6, 7);
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let r = _mm_insert_epi16(a, 9, 0);
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let e = _mm_setr_epi16(9, 1, 2, 3, 4, 5, 6, 7);
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assert_eq_m128i(r, e);
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}
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fn test_checked_mul() {
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fn test_checked_mul() {
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let u: Option<u8> = u8::from_str_radix("1000", 10).ok();
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let u: Option<u8> = u8::from_str_radix("1000", 10).ok();
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assert_eq!(u, None);
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assert_eq!(u, None);
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@ -33,6 +33,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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});
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});
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};
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};
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// FIXME support float comparisons
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simd_eq, (c x, c y) {
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simd_eq, (c x, c y) {
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validate_simd_type!(fx, intrinsic, span, x.layout().ty);
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validate_simd_type!(fx, intrinsic, span, x.layout().ty);
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simd_cmp!(fx, Equal(x, y) -> ret);
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simd_cmp!(fx, Equal(x, y) -> ret);
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@ -113,7 +114,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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}
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}
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};
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};
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simd_insert, (c base, o idx, v _val) {
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simd_insert, (c base, o idx, c val) {
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// FIXME validate
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// FIXME validate
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let idx_const = if let Some(idx_const) = crate::constant::mir_operand_get_const_val(fx, idx) {
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let idx_const = if let Some(idx_const) = crate::constant::mir_operand_get_const_val(fx, idx) {
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idx_const
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idx_const
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@ -132,13 +133,9 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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fx.tcx.sess.span_fatal(fx.mir.span, &format!("[simd_insert] idx {} >= lane_count {}", idx, lane_count));
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fx.tcx.sess.span_fatal(fx.mir.span, &format!("[simd_insert] idx {} >= lane_count {}", idx, lane_count));
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}
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}
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// FIXME implement this
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ret.write_cvalue(fx, base);
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fx.tcx.sess.span_warn(
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let ret_lane = ret.place_field(fx, mir::Field::new(idx.try_into().unwrap()));
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fx.mir.span,
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ret_lane.write_cvalue(fx, val);
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"`simd_insert` is not yet implemented. Calling this function will panic.",
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);
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let val = crate::trap::trap_unimplemented_ret_value(fx, ret.layout(), "`simd_insert` is not yet implemented");
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ret.write_cvalue(fx, val);
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};
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};
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simd_extract, (c v, o idx) {
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simd_extract, (c v, o idx) {
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@ -233,5 +230,12 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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validate_simd_type!(fx, intrinsic, span, x.layout().ty);
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validate_simd_type!(fx, intrinsic, span, x.layout().ty);
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simd_flt_binop!(fx, fmax(x, y) -> ret);
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simd_flt_binop!(fx, fmax(x, y) -> ret);
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};
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};
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// simd_fabs
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// simd_saturating_add
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// simd_bitmask
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// simd_select
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// simd_reduce_add_{,un}ordered
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// simd_rem
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}
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}
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}
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}
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