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Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu

Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
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Jubilee 2024-06-21 21:02:26 -07:00 committed by GitHub
commit e7956cd994
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4 changed files with 108 additions and 11 deletions

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@ -2054,6 +2054,8 @@ symbols! {
yes,
yield_expr,
ymm_reg,
zfh,
zfhmin,
zmm_reg,
}
}