Auto merge of #85279 - DrChat:asm_powerpc64, r=Amanieu
Add asm!() support for PowerPC64
I was anticipating this to be difficult so I didn't do it as part of #84732... but this was pretty easy to do 👀
This commit is contained in:
commit
e78bccfbc0
4 changed files with 47 additions and 7 deletions
|
@ -283,7 +283,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
|
|||
}
|
||||
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {}
|
||||
InlineAsmArch::Nvptx64 => {}
|
||||
InlineAsmArch::PowerPC => {}
|
||||
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {}
|
||||
InlineAsmArch::Hexagon => {}
|
||||
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {}
|
||||
InlineAsmArch::SpirV => {}
|
||||
|
|
|
@ -184,6 +184,7 @@ pub enum InlineAsmArch {
|
|||
Mips,
|
||||
Mips64,
|
||||
PowerPC,
|
||||
PowerPC64,
|
||||
SpirV,
|
||||
Wasm32,
|
||||
}
|
||||
|
@ -201,6 +202,7 @@ impl FromStr for InlineAsmArch {
|
|||
"riscv64" => Ok(Self::RiscV64),
|
||||
"nvptx64" => Ok(Self::Nvptx64),
|
||||
"powerpc" => Ok(Self::PowerPC),
|
||||
"powerpc64" => Ok(Self::PowerPC64),
|
||||
"hexagon" => Ok(Self::Hexagon),
|
||||
"mips" => Ok(Self::Mips),
|
||||
"mips64" => Ok(Self::Mips64),
|
||||
|
@ -290,7 +292,7 @@ impl InlineAsmReg {
|
|||
InlineAsmArch::Nvptx64 => {
|
||||
Self::Nvptx(NvptxInlineAsmReg::parse(arch, has_feature, target, &name)?)
|
||||
}
|
||||
InlineAsmArch::PowerPC => {
|
||||
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
|
||||
Self::PowerPC(PowerPCInlineAsmReg::parse(arch, has_feature, target, &name)?)
|
||||
}
|
||||
InlineAsmArch::Hexagon => {
|
||||
|
@ -485,7 +487,9 @@ impl InlineAsmRegClass {
|
|||
Self::RiscV(RiscVInlineAsmRegClass::parse(arch, name)?)
|
||||
}
|
||||
InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmRegClass::parse(arch, name)?),
|
||||
InlineAsmArch::PowerPC => Self::PowerPC(PowerPCInlineAsmRegClass::parse(arch, name)?),
|
||||
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
|
||||
Self::PowerPC(PowerPCInlineAsmRegClass::parse(arch, name)?)
|
||||
}
|
||||
InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmRegClass::parse(arch, name)?),
|
||||
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
|
||||
Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?)
|
||||
|
@ -653,7 +657,7 @@ pub fn allocatable_registers(
|
|||
nvptx::fill_reg_map(arch, has_feature, target, &mut map);
|
||||
map
|
||||
}
|
||||
InlineAsmArch::PowerPC => {
|
||||
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
|
||||
let mut map = powerpc::regclass_map();
|
||||
powerpc::fill_reg_map(arch, has_feature, target, &mut map);
|
||||
map
|
||||
|
|
|
@ -33,10 +33,16 @@ impl PowerPCInlineAsmRegClass {
|
|||
|
||||
pub fn supported_types(
|
||||
self,
|
||||
_arch: InlineAsmArch,
|
||||
arch: InlineAsmArch,
|
||||
) -> &'static [(InlineAsmType, Option<&'static str>)] {
|
||||
match self {
|
||||
Self::reg | Self::reg_nonzero => types! { _: I8, I16, I32; },
|
||||
Self::reg | Self::reg_nonzero => {
|
||||
if arch == InlineAsmArch::PowerPC {
|
||||
types! { _: I8, I16, I32; }
|
||||
} else {
|
||||
types! { _: I8, I16, I32, I64; }
|
||||
}
|
||||
}
|
||||
Self::freg => types! { _: F32, F64; },
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue