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Move SIMD layout logic to rustc_abi

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This commit is contained in:
Moulins 2025-03-07 21:17:16 +01:00
parent 9917173575
commit e69491ac60
5 changed files with 117 additions and 79 deletions
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7
compiler/rustc_middle/src/ty/layout.rs
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@ -182,12 +182,7 @@ pub const WIDE_PTR_ADDR: usize = 0;
/// - For a slice, this is the length.
pub const WIDE_PTR_EXTRA: usize = 1;
/// The maximum supported number of lanes in a SIMD vector.
///
/// This value is selected based on backend support:
/// * LLVM does not appear to have a vector width limit.
/// * Cranelift stores the base-2 log of the lane count in a 4 bit integer.
pub const MAX_SIMD_LANES: u64 = 1 << 0xF;
pub const MAX_SIMD_LANES: u64 = rustc_abi::MAX_SIMD_LANES;
/// Used in `check_validity_requirement` to indicate the kind of initialization
/// that is checked to be valid