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Merge commit 'db1a31c243' into subtree-update_cg_gcc_2025-04-18

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Guillaume Gomez 2025-04-18 21:19:50 +02:00
commit e4ea67b3d7
52 changed files with 959 additions and 1241 deletions
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53
compiler/rustc_codegen_gcc/tests/run/asm.rs
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@ -174,6 +174,59 @@ fn asm() {
mem_cpy(array2.as_mut_ptr(), array1.as_ptr(), 3);
}
assert_eq!(array1, array2);
// in and clobber registers cannot overlap. This tests that the lateout register without an
// output place (indicated by the `_`) is not added to the list of clobbered registers
let x = 8;
let y: i32;
unsafe {
asm!(
"mov rax, rdi",
in("rdi") x,
lateout("rdi") _,
out("rax") y,
);
}
assert_eq!((x, y), (8, 8));
// sysv64 is the default calling convention on unix systems. The rdi register is
// used to pass arguments in the sysv64 calling convention, so this register will be clobbered
#[cfg(unix)]
{
let x = 16;
let y: i32;
unsafe {
asm!(
"mov rax, rdi",
in("rdi") x,
out("rax") y,
clobber_abi("sysv64"),
);
}
assert_eq!((x, y), (16, 16));
}
// the `b` suffix for registers in the `reg_byte` register class is not supported in GCC
// and needs to be stripped in order to use these registers.
unsafe {
core::arch::asm!(
"",
out("al") _,
out("bl") _,
out("cl") _,
out("dl") _,
out("sil") _,
out("dil") _,
out("r8b") _,
out("r9b") _,
out("r10b") _,
out("r11b") _,
out("r12b") _,
out("r13b") _,
out("r14b") _,
out("r15b") _,
);
}
}
#[cfg(not(target_arch = "x86_64"))]