change the default linker of the ARM Cortex-M targets
to rust-lld so users won't need an external linker to build programs
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parent
727eabd681
commit
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5 changed files with 10 additions and 11 deletions
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@ -42,9 +42,8 @@ pub fn opts() -> TargetOptions {
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// See rust-lang/rfcs#1645 for a discussion about these defaults
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TargetOptions {
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executables: true,
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// In 99%+ of cases, we want to use the `arm-none-eabi-gcc` compiler (there aren't many
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// options around)
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linker: Some("arm-none-eabi-gcc".to_string()),
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// In most cases, LLD is good enough
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linker: Some("rust-lld".to_string()),
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// Because these devices have very little resources having an unwinder is too onerous so we
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// default to "abort" because the "unwind" strategy is very rare.
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panic_strategy: PanicStrategy::Abort,
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@ -10,7 +10,7 @@
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// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
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use spec::{LinkerFlavor, Target, TargetOptions, TargetResult};
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use spec::{LinkerFlavor, LldFlavor, Target, TargetOptions, TargetResult};
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pub fn target() -> TargetResult {
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Ok(Target {
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@ -23,7 +23,7 @@ pub fn target() -> TargetResult {
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target_os: "none".to_string(),
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target_env: String::new(),
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target_vendor: String::new(),
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linker_flavor: LinkerFlavor::Gcc,
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linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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options: TargetOptions {
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// The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
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@ -19,7 +19,7 @@
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// To opt-in to hardware accelerated floating point operations, you can use, for example,
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// `-C target-feature=+vfp4` or `-C target-cpu=cortex-m4`.
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use spec::{LinkerFlavor, Target, TargetOptions, TargetResult};
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use spec::{LinkerFlavor, LldFlavor, Target, TargetOptions, TargetResult};
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pub fn target() -> TargetResult {
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Ok(Target {
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@ -32,7 +32,7 @@ pub fn target() -> TargetResult {
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target_os: "none".to_string(),
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target_env: String::new(),
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target_vendor: String::new(),
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linker_flavor: LinkerFlavor::Gcc,
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linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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options: TargetOptions {
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max_atomic_width: Some(32),
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@ -18,7 +18,7 @@
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//
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// To opt into double precision hardware support, use the `-C target-feature=-fp-only-sp` flag.
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use spec::{LinkerFlavor, Target, TargetOptions, TargetResult};
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use spec::{LinkerFlavor, LldFlavor, Target, TargetOptions, TargetResult};
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pub fn target() -> TargetResult {
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Ok(Target {
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@ -31,7 +31,7 @@ pub fn target() -> TargetResult {
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target_os: "none".to_string(),
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target_env: String::new(),
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target_vendor: String::new(),
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linker_flavor: LinkerFlavor::Gcc,
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linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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options: TargetOptions {
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// `+vfp4` is the lowest common denominator between the Cortex-M4 (vfp4-16) and the
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@ -10,7 +10,7 @@
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// Targets the Cortex-M3 processor (ARMv7-M)
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use spec::{LinkerFlavor, Target, TargetOptions, TargetResult};
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use spec::{LinkerFlavor, LldFlavor, Target, TargetOptions, TargetResult};
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pub fn target() -> TargetResult {
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Ok(Target {
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@ -23,7 +23,7 @@ pub fn target() -> TargetResult {
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target_os: "none".to_string(),
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target_env: String::new(),
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target_vendor: String::new(),
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linker_flavor: LinkerFlavor::Gcc,
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linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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options: TargetOptions {
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max_atomic_width: Some(32),
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