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Clarify when MIR Div/Rem trigger UB

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Scott McMurray 2023-06-01 18:52:11 -07:00
parent 73f104b6d6
commit adb37d4999
1 changed files with 9 additions and 4 deletions
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13
compiler/rustc_middle/src/mir/syntax.rs
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@ -1272,13 +1272,18 @@ pub enum BinOp {
Mul, Mul,
/// The `/` operator (division) /// The `/` operator (division)
/// ///
/// Division by zero is UB, because the compiler should have inserted checks /// For integer types, division by zero is UB, as is `MIN / -1` for signed.
/// prior to this. /// The compiler should have inserted checks prior to this.
///
/// Floating-point division by zero is safe, and does not need guards.
Div, Div,
/// The `%` operator (modulus) /// The `%` operator (modulus)
/// ///
/// Using zero as the modulus (second operand) is UB, because the compiler /// For integer types, using zero as the modulus (second operand) is UB,
/// should have inserted checks prior to this. /// as is `MIN % -1` for signed.
/// The compiler should have inserted checks prior to this.
///
/// Floating-point remainder by zero is safe, and does not need guards.
Rem, Rem,
/// The `^` operator (bitwise xor) /// The `^` operator (bitwise xor)
BitXor, BitXor,