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Rollup merge of #118864 - farnoy:masked-load-store-fixes, r=workingjubilee

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Fix alignment passed down to LLVM for simd_masked_load

Follow up to #117953

The alignment for a masked load operation should be that of the element/lane, not the vector as a whole

It can produce miscompilations after the LLVM optimizer notices the higher alignment and promotes this to an unmasked, aligned load followed up by blend/select - https://rust.godbolt.org/z/KEeGbevbb
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Jubilee 2023-12-12 18:48:51 -08:00 • committed by GitHub
commit a33f1a3d3a
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3 changed files with 3 additions and 3 deletions
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2
compiler/rustc_codegen_llvm/src/intrinsic.rs
View file

@ -1568,7 +1568,7 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
// Alignment of T, must be a constant integer value:
let alignment_ty = bx.type_i32();
let alignment = bx.const_i32(bx.align_of(values_ty).bytes() as i32);
let alignment = bx.const_i32(bx.align_of(values_elem).bytes() as i32);
// Truncate the mask vector to a vector of i1s:
let (mask, mask_ty) = {

2
tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-load.rs
View file

@ -21,7 +21,7 @@ extern "platform-intrinsic" {
#[no_mangle]
pub unsafe fn load_f32x2(mask: Vec2<i32>, pointer: *const f32,
values: Vec2<f32>) -> Vec2<f32> {
// CHECK: call <2 x float> @llvm.masked.load.v2f32.p0(ptr {{.*}}, i32 {{.*}}, <2 x i1> {{.*}}, <2 x float> {{.*}})
// CHECK: call <2 x float> @llvm.masked.load.v2f32.p0(ptr {{.*}}, i32 4, <2 x i1> {{.*}}, <2 x float> {{.*}})
simd_masked_load(mask, pointer, values)
}

2
tests/codegen/simd-intrinsic/simd-intrinsic-generic-masked-store.rs
View file

@ -20,7 +20,7 @@ extern "platform-intrinsic" {
// CHECK-LABEL: @store_f32x2
#[no_mangle]
pub unsafe fn store_f32x2(mask: Vec2<i32>, pointer: *mut f32, values: Vec2<f32>) {
// CHECK: call void @llvm.masked.store.v2f32.p0(<2 x float> {{.*}}, ptr {{.*}}, i32 {{.*}}, <2 x i1> {{.*}})
// CHECK: call void @llvm.masked.store.v2f32.p0(<2 x float> {{.*}}, ptr {{.*}}, i32 4, <2 x i1> {{.*}})
simd_masked_store(mask, pointer, values)
}