Add f16/f128 handling in a couple places
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@ -121,8 +121,10 @@ impl LlvmType for Reg {
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match self.kind {
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RegKind::Integer => cx.type_ix(self.size.bits()),
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RegKind::Float => match self.size.bits() {
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16 => cx.type_f16(),
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32 => cx.type_f32(),
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64 => cx.type_f64(),
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128 => cx.type_f128(),
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_ => bug!("unsupported float: {:?}", self),
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},
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RegKind::Vector => cx.type_vector(cx.type_i8(), self.size.bytes()),
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