bjoernager/rust
bjoernager/rust
1
Fork 0
Code Activity

Stop emitting non-power-of-two vectors in basic LLVM codegen

Browse source
This commit is contained in:
Scott McMurray 2023-08-25 20:06:57 -07:00
parent ac89e1615d
commit 84e305dd93
3 changed files with 43 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

4
compiler/rustc_codegen_llvm/src/type_of.rs
View file

@ -405,7 +405,11 @@ impl<'tcx> LayoutLlvmExt<'tcx> for TyAndLayout<'tcx> {
// Vectors, even for non-power-of-two sizes, have the same layout as
// arrays but don't count as aggregate types
// While LLVM theoretically supports non-power-of-two sizes, and they
// often work fine, sometimes x86-isel deals with them horribly
// (see #115212) so for now only use power-of-two ones.
if let FieldsShape::Array { count, .. } = self.layout.fields()
&& count.is_power_of_two()
&& let element = self.field(cx, 0)
&& element.ty.is_integral()
{