bjoernager/rust
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Add asm! support for mips64

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This commit is contained in:
Lzu Tao 2020-10-04 07:29:25 +00:00
parent 6cb062dacf
commit 79f477bb1f
5 changed files with 119 additions and 83 deletions
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9
compiler/rustc_target/src/asm/mips.rs
View file

@ -32,11 +32,12 @@ impl MipsInlineAsmRegClass {
pub fn supported_types(
self,
_arch: InlineAsmArch,
arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<&'static str>)] {
match self {
Self::reg => types! { _: I8, I16, I32, F32; },
Self::freg => types! { _: F32, F64; },
match (self, arch) {
(Self::reg, InlineAsmArch::Mips64) => types! { _: I8, I16, I32, I64, F32, F64; },
(Self::reg, _) => types! { _: I8, I16, I32, F32; },
(Self::freg, _) => types! { _: F32, F64; },
}
}
}

10
compiler/rustc_target/src/asm/mod.rs
View file

@ -176,6 +176,7 @@ pub enum InlineAsmArch {
Nvptx64,
Hexagon,
Mips,
Mips64,
}
impl FromStr for InlineAsmArch {
@ -192,6 +193,7 @@ impl FromStr for InlineAsmArch {
"nvptx64" => Ok(Self::Nvptx64),
"hexagon" => Ok(Self::Hexagon),
"mips" => Ok(Self::Mips),
"mips64" => Ok(Self::Mips64),
_ => Err(()),
}
}
@ -259,7 +261,7 @@ impl InlineAsmReg {
InlineAsmArch::Hexagon => {
Self::Hexagon(HexagonInlineAsmReg::parse(arch, has_feature, target, &name)?)
}
InlineAsmArch::Mips => {
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
Self::Mips(MipsInlineAsmReg::parse(arch, has_feature, target, &name)?)
}
})
@ -409,7 +411,9 @@ impl InlineAsmRegClass {
InlineAsmArch::Hexagon => {
Self::Hexagon(HexagonInlineAsmRegClass::parse(arch, name)?)
}
InlineAsmArch::Mips => Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?),
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?)
}
})
})
}
@ -565,7 +569,7 @@ pub fn allocatable_registers(
hexagon::fill_reg_map(arch, has_feature, target, &mut map);
map
}
InlineAsmArch::Mips => {
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
let mut map = mips::regclass_map();
mips::fill_reg_map(arch, has_feature, target, &mut map);
map