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Add asm! support for mips64

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This commit is contained in:
Lzu Tao 2020-10-04 07:29:25 +00:00
parent 6cb062dacf
commit 79f477bb1f
5 changed files with 119 additions and 83 deletions
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5
compiler/rustc_codegen_llvm/src/asm.rs
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@ -259,7 +259,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {}
InlineAsmArch::Nvptx64 => {}
InlineAsmArch::Hexagon => {}
InlineAsmArch::Mips => {}
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {}
}
}
if !options.contains(InlineAsmOptions::NOMEM) {
@ -710,6 +710,7 @@ fn llvm_fixup_input(
// MIPS only supports register-length arithmetics.
Primitive::Int(Integer::I8 | Integer::I16, _) => bx.zext(value, bx.cx.type_i32()),
Primitive::F32 => bx.bitcast(value, bx.cx.type_i32()),
Primitive::F64 => bx.bitcast(value, bx.cx.type_i64()),
_ => value,
},
_ => value,
@ -785,6 +786,7 @@ fn llvm_fixup_output(
Primitive::Int(Integer::I8, _) => bx.trunc(value, bx.cx.type_i8()),
Primitive::Int(Integer::I16, _) => bx.trunc(value, bx.cx.type_i16()),
Primitive::F32 => bx.bitcast(value, bx.cx.type_f32()),
Primitive::F64 => bx.bitcast(value, bx.cx.type_f64()),
_ => value,
},
_ => value,
@ -854,6 +856,7 @@ fn llvm_fixup_output_type(
// MIPS only supports register-length arithmetics.
Primitive::Int(Integer::I8 | Integer::I16, _) => cx.type_i32(),
Primitive::F32 => cx.type_i32(),
Primitive::F64 => cx.type_i64(),
_ => layout.llvm_type(cx),
},
_ => layout.llvm_type(cx),