Merge commit '08a6d6e16b' into sync-cg_gcc-2023-03-04
This commit is contained in:
Antoni Boucher
commit
6bb2af0e6d
61 changed files with 5730 additions and 1123 deletions
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@ -157,7 +157,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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use ConstraintOrRegister::*;
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let (constraint, ty) = match (reg_to_gcc(reg), place) {
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(Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx, false)),
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(Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx)),
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// When `reg` is a class and not an explicit register but the out place is not specified,
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// we need to create an unused output variable to assign the output to. This var
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// needs to be of a type that's "compatible" with the register class, but specific type
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@ -226,7 +226,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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// This decision is also backed by the fact that LLVM needs in and out
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// values to be of *exactly the same type*, not just "compatible".
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// I'm not sure if GCC is so picky too, but better safe than sorry.
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let ty = in_value.layout.gcc_type(self.cx, false);
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let ty = in_value.layout.gcc_type(self.cx);
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let tmp_var = self.current_func().new_local(None, ty, "output_register");
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// If the out_place is None (i.e `inout(reg) _` syntax was used), we translate
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@ -286,7 +286,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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continue
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};
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let ty = out_place.layout.gcc_type(self.cx, false);
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let ty = out_place.layout.gcc_type(self.cx);
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let tmp_var = self.current_func().new_local(None, ty, "output_register");
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tmp_var.set_register_name(reg_name);
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@ -306,7 +306,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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// `in("explicit register") var`
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InlineAsmOperandRef::In { reg, value } => {
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if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
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let ty = value.layout.gcc_type(self.cx, false);
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let ty = value.layout.gcc_type(self.cx);
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let reg_var = self.current_func().new_local(None, ty, "input_register");
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reg_var.set_register_name(reg_name);
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self.llbb().add_assignment(None, reg_var, value.immediate());
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@ -325,7 +325,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
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if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
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// See explanation in the first pass.
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let ty = in_value.layout.gcc_type(self.cx, false);
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let ty = in_value.layout.gcc_type(self.cx);
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let tmp_var = self.current_func().new_local(None, ty, "output_register");
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tmp_var.set_register_name(reg_name);
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@ -353,8 +353,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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inputs.push(AsmInOperand {
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constraint: "X".into(),
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rust_idx,
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val: self.cx.rvalue_as_function(get_fn(self.cx, instance))
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.get_address(None),
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val: get_fn(self.cx, instance).get_address(None),
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});
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}
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@ -382,15 +381,19 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
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for piece in template {
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match *piece {
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InlineAsmTemplatePiece::String(ref string) => {
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// TODO(@Commeownist): switch to `Iterator::intersperse` once it's stable
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let mut iter = string.split('%');
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if let Some(s) = iter.next() {
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template_str.push_str(s);
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}
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for s in iter {
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template_str.push_str("%%");
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template_str.push_str(s);
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for char in string.chars() {
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// TODO(antoyo): might also need to escape | if rustc doesn't do it.
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let escaped_char =
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match char {
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'%' => "%%",
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'{' => "%{",
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'}' => "%}",
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_ => {
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template_str.push(char);
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continue;
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},
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};
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template_str.push_str(escaped_char);
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}
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}
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InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span: _ } => {
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@ -565,39 +568,52 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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_ => unimplemented!(),
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}
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},
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// They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
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InlineAsmRegOrRegClass::RegClass(reg) => match reg {
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => unimplemented!(),
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => unimplemented!(),
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => unimplemented!(),
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8) => unimplemented!(),
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => unimplemented!(),
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => unimplemented!(),
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InlineAsmRegClass::Avr(_) => unimplemented!(),
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InlineAsmRegClass::Bpf(_) => unimplemented!(),
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => unimplemented!(),
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InlineAsmRegClass::Msp430(_) => unimplemented!(),
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => unimplemented!(),
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => unimplemented!(),
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => unimplemented!(),
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => unimplemented!(),
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => unimplemented!(),
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
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InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
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// https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
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// "define_constraint".
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
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InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
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| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
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unreachable!("clobber-only")
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},
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => unimplemented!(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => unimplemented!(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
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@ -605,16 +621,18 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0) => unimplemented!(),
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => unimplemented!(),
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::tmm_reg,
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X86InlineAsmRegClass::kreg0
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| X86InlineAsmRegClass::x87_reg
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| X86InlineAsmRegClass::mmx_reg
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| X86InlineAsmRegClass::tmm_reg,
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) => unreachable!("clobber-only"),
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("GCC backend does not support SPIR-V")
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}
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => unimplemented!(),
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Err => unreachable!(),
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}
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};
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@ -692,21 +710,23 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
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&& options.contains(InlineAsmOptions::ATT_SYNTAX);
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// Build the template string
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let mut template_str = String::new();
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let mut template_str = ".pushsection .text\n".to_owned();
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if att_dialect {
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template_str.push_str(".att_syntax\n");
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}
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for piece in template {
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match *piece {
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InlineAsmTemplatePiece::String(ref string) => {
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for line in string.lines() {
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let mut index = 0;
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while index < string.len() {
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// NOTE: gcc does not allow inline comment, so remove them.
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let line =
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if let Some(index) = line.rfind("//") {
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&line[..index]
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}
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else {
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line
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};
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template_str.push_str(line);
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template_str.push('\n');
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let comment_index = string[index..].find("//")
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.map(|comment_index| comment_index + index)
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.unwrap_or(string.len());
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template_str.push_str(&string[index..comment_index]);
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index = string[comment_index..].find('\n')
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.map(|index| index + comment_index)
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.unwrap_or(string.len());
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}
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},
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InlineAsmTemplatePiece::Placeholder { operand_idx, modifier: _, span: _ } => {
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@ -719,6 +739,8 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
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}
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GlobalAsmOperandRef::SymFn { instance } => {
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let function = get_fn(self, instance);
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self.add_used_function(function);
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// TODO(@Amanieu): Additional mangling is needed on
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// some targets to add a leading underscore (Mach-O)
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// or byte count suffixes (x86 Windows).
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@ -727,6 +749,7 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
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}
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GlobalAsmOperandRef::SymStatic { def_id } => {
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// TODO(antoyo): set the global variable as used.
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// TODO(@Amanieu): Additional mangling is needed on
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// some targets to add a leading underscore (Mach-O).
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let instance = Instance::mono(self.tcx, def_id);
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@ -738,48 +761,51 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
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}
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}
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let template_str =
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if att_dialect {
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format!(".att_syntax\n\t{}\n\t.intel_syntax noprefix", template_str)
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}
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else {
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template_str
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};
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if att_dialect {
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template_str.push_str("\n\t.intel_syntax noprefix");
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}
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// NOTE: seems like gcc will put the asm in the wrong section, so set it to .text manually.
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let template_str = format!(".pushsection .text\n{}\n.popsection", template_str);
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template_str.push_str("\n.popsection");
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self.context.add_top_level_asm(None, &template_str);
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}
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}
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fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option<char>) -> Option<char> {
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// The modifiers can be retrieved from
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// https://gcc.gnu.org/onlinedocs/gcc/Modifiers.html#Modifiers
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match reg {
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => modifier,
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => modifier,
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg)
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| InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
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unimplemented!()
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if modifier == Some('v') { None } else { modifier }
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => unimplemented!(),
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => None,
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => unimplemented!(),
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => None,
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8) => unimplemented!(),
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8) => Some('P'),
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => {
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unimplemented!()
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if modifier.is_none() {
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Some('q')
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} else {
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modifier
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}
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}
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InlineAsmRegClass::Avr(_) => unimplemented!(),
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InlineAsmRegClass::Bpf(_) => unimplemented!(),
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InlineAsmRegClass::Hexagon(_) => unimplemented!(),
|
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InlineAsmRegClass::Mips(_) => unimplemented!(),
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InlineAsmRegClass::Msp430(_) => unimplemented!(),
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InlineAsmRegClass::Nvptx(_) => unimplemented!(),
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InlineAsmRegClass::PowerPC(_) => unimplemented!(),
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InlineAsmRegClass::Hexagon(_) => None,
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InlineAsmRegClass::Mips(_) => None,
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InlineAsmRegClass::Nvptx(_) => None,
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InlineAsmRegClass::PowerPC(_) => None,
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
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| InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => unimplemented!(),
|
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => unimplemented!(),
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| InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => None,
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
|
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unreachable!("clobber-only")
|
||||
}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => match modifier {
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None => if arch == InlineAsmArch::X86_64 { Some('q') } else { Some('k') },
|
||||
|
|
@ -803,16 +829,29 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
|
|||
_ => unreachable!(),
|
||||
},
|
||||
InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => None,
|
||||
InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0) => None,
|
||||
InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::tmm_reg) => {
|
||||
InlineAsmRegClass::X86(
|
||||
X86InlineAsmRegClass::x87_reg
|
||||
| X86InlineAsmRegClass::mmx_reg
|
||||
| X86InlineAsmRegClass::kreg0
|
||||
| X86InlineAsmRegClass::tmm_reg,
|
||||
) => {
|
||||
unreachable!("clobber-only")
|
||||
}
|
||||
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => unimplemented!(),
|
||||
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
|
||||
InlineAsmRegClass::Bpf(_) => None,
|
||||
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair)
|
||||
| InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw)
|
||||
| InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => match modifier {
|
||||
Some('h') => Some('B'),
|
||||
Some('l') => Some('A'),
|
||||
_ => None,
|
||||
},
|
||||
InlineAsmRegClass::Avr(_) => None,
|
||||
InlineAsmRegClass::S390x(_) => None,
|
||||
InlineAsmRegClass::Msp430(_) => None,
|
||||
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
|
||||
bug!("LLVM backend does not support SPIR-V")
|
||||
},
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => unimplemented!(),
|
||||
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => unimplemented!(),
|
||||
}
|
||||
InlineAsmRegClass::Err => unreachable!(),
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue