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Rollup merge of #95740 - Amanieu:kreg0, r=nagisa

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asm: Add a kreg0 register class on x86 which includes k0

Previously we only exposed a kreg register class which excludes the k0
register since it can't be used in many instructions. However k0 is a
valid register and we need to have a way of marking it as clobbered for
clobber_abi.

Fixes #94977
This commit is contained in:
Dylan DPC 2022-04-19 22:57:39 +02:00 • committed by GitHub
commit 69e45d73b9
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8 changed files with 40 additions and 25 deletions
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6
compiler/rustc_target/src/asm/mod.rs
View file

@ -893,7 +893,7 @@ impl InlineAsmClobberAbi {
xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
k1, k2, k3, k4, k5, k6, k7,
k0, k1, k2, k3, k4, k5, k6, k7,
mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7,
st0, st1, st2, st3, st4, st5, st6, st7,
@ -908,7 +908,7 @@ impl InlineAsmClobberAbi {
zmm16, zmm17, zmm18, zmm19, zmm20, zmm21, zmm22, zmm23,
zmm24, zmm25, zmm26, zmm27, zmm28, zmm29, zmm30, zmm31,
k1, k2, k3, k4, k5, k6, k7,
k0, k1, k2, k3, k4, k5, k6, k7,
mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7,
st0, st1, st2, st3, st4, st5, st6, st7,
@ -927,7 +927,7 @@ impl InlineAsmClobberAbi {
zmm16, zmm17, zmm18, zmm19, zmm20, zmm21, zmm22, zmm23,
zmm24, zmm25, zmm26, zmm27, zmm28, zmm29, zmm30, zmm31,
k1, k2, k3, k4, k5, k6, k7,
k0, k1, k2, k3, k4, k5, k6, k7,
mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7,
st0, st1, st2, st3, st4, st5, st6, st7,

11
compiler/rustc_target/src/asm/x86.rs
View file

@ -14,6 +14,7 @@ def_reg_class! {
ymm_reg,
zmm_reg,
kreg,
kreg0,
mmx_reg,
x87_reg,
}
@ -38,7 +39,7 @@ impl X86InlineAsmRegClass {
}
Self::reg_byte => &[],
Self::xmm_reg | Self::ymm_reg | Self::zmm_reg => &['x', 'y', 'z'],
Self::kreg => &[],
Self::kreg | Self::kreg0 => &[],
Self::mmx_reg | Self::x87_reg => &[],
}
}
@ -77,7 +78,7 @@ impl X86InlineAsmRegClass {
256 => Some(('y', "ymm0")),
_ => Some(('x', "xmm0")),
},
Self::kreg => None,
Self::kreg | Self::kreg0 => None,
Self::mmx_reg | Self::x87_reg => None,
}
}
@ -95,7 +96,7 @@ impl X86InlineAsmRegClass {
Self::xmm_reg => Some(('x', "xmm0")),
Self::ymm_reg => Some(('y', "ymm0")),
Self::zmm_reg => Some(('z', "zmm0")),
Self::kreg => None,
Self::kreg | Self::kreg0 => None,
Self::mmx_reg | Self::x87_reg => None,
}
}
@ -132,6 +133,7 @@ impl X86InlineAsmRegClass {
avx512f: I8, I16;
avx512bw: I32, I64;
},
Self::kreg0 => &[],
Self::mmx_reg | Self::x87_reg => &[],
}
}
@ -294,6 +296,7 @@ def_regs! {
zmm29: zmm_reg = ["zmm29", "xmm29", "ymm29"] % x86_64_only,
zmm30: zmm_reg = ["zmm30", "xmm30", "ymm30"] % x86_64_only,
zmm31: zmm_reg = ["zmm31", "xmm31", "ymm31"] % x86_64_only,
k0: kreg0 = ["k0"],
k1: kreg = ["k1"],
k2: kreg = ["k2"],
k3: kreg = ["k3"],
@ -323,8 +326,6 @@ def_regs! {
"the stack pointer cannot be used as an operand for inline asm",
#error = ["ip", "eip", "rip"] =>
"the instruction pointer cannot be used as an operand for inline asm",
#error = ["k0"] =>
"the k0 AVX mask register cannot be used as an operand for inline asm",
}
}