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Rollup merge of #99043 - compiler-errors:derive-nit, r=cjgillot

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Collapse some weirdly-wrapping derives

self-explanatory
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Dylan DPC 2022-07-09 11:28:07 +05:30 • committed by GitHub
commit 6497130baa
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2 changed files with 12 additions and 72 deletions
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28
compiler/rustc_hir/src/hir.rs
View file

@ -1438,18 +1438,8 @@ impl<'hir> Body<'hir> {
} }
/// The type of source expression that caused this generator to be created. /// The type of source expression that caused this generator to be created.
#[derive( #[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
Clone, #[derive(HashStable_Generic, Encodable, Decodable)]
PartialEq,
PartialOrd,
Eq,
Hash,
HashStable_Generic,
Encodable,
Decodable,
Debug,
Copy
)]
pub enum GeneratorKind { pub enum GeneratorKind {
/// An explicit `async` block or the body of an async function. /// An explicit `async` block or the body of an async function.
Async(AsyncGeneratorKind), Async(AsyncGeneratorKind),
@ -1481,18 +1471,8 @@ impl GeneratorKind {
/// ///
/// This helps error messages but is also used to drive coercions in /// This helps error messages but is also used to drive coercions in
/// type-checking (see #60424). /// type-checking (see #60424).
#[derive( #[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
Clone, #[derive(HashStable_Generic, Encodable, Decodable)]
PartialEq,
PartialOrd,
Eq,
Hash,
HashStable_Generic,
Encodable,
Decodable,
Debug,
Copy
)]
pub enum AsyncGeneratorKind { pub enum AsyncGeneratorKind {
/// An explicit `async` block written by the user. /// An explicit `async` block written by the user.
Block, Block,

56
compiler/rustc_target/src/asm/mod.rs
View file

@ -244,18 +244,8 @@ impl FromStr for InlineAsmArch {
} }
} }
#[derive( #[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
Copy, #[derive(HashStable_Generic, Encodable, Decodable)]
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
pub enum InlineAsmReg { pub enum InlineAsmReg {
X86(X86InlineAsmReg), X86(X86InlineAsmReg),
Arm(ArmInlineAsmReg), Arm(ArmInlineAsmReg),
@ -406,18 +396,8 @@ impl InlineAsmReg {
} }
} }
#[derive( #[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
Copy, #[derive(HashStable_Generic, Encodable, Decodable)]
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
pub enum InlineAsmRegClass { pub enum InlineAsmRegClass {
X86(X86InlineAsmRegClass), X86(X86InlineAsmRegClass),
Arm(ArmInlineAsmRegClass), Arm(ArmInlineAsmRegClass),
@ -620,18 +600,8 @@ impl InlineAsmRegClass {
} }
} }
#[derive( #[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
Copy, #[derive(HashStable_Generic, Encodable, Decodable)]
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
pub enum InlineAsmRegOrRegClass { pub enum InlineAsmRegOrRegClass {
Reg(InlineAsmReg), Reg(InlineAsmReg),
RegClass(InlineAsmRegClass), RegClass(InlineAsmRegClass),
@ -808,18 +778,8 @@ pub fn allocatable_registers(
} }
} }
#[derive( #[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
Copy, #[derive(HashStable_Generic, Encodable, Decodable)]
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
pub enum InlineAsmClobberAbi { pub enum InlineAsmClobberAbi {
X86, X86,
X86_64Win, X86_64Win,