Auto merge of #52787 - riscv-rust:riscv-rust-pr, r=alexcrichton
Enable RISCV - Enable LLVM backend. - Implement call abi. - Add built-in target riscv32imac-unknown-none. - Enable CI.
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commit
60c1ee7645
11 changed files with 139 additions and 4 deletions
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@ -171,6 +171,12 @@ bool LLVMRustPassManagerBuilderPopulateThinLTOPassManager(
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#define SUBTARGET_MSP430
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#endif
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#ifdef LLVM_COMPONENT_RISCV
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#define SUBTARGET_RISCV SUBTARGET(RISCV)
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#else
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#define SUBTARGET_RISCV
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#endif
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#ifdef LLVM_COMPONENT_SPARC
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#define SUBTARGET_SPARC SUBTARGET(Sparc)
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#else
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@ -192,7 +198,8 @@ bool LLVMRustPassManagerBuilderPopulateThinLTOPassManager(
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SUBTARGET_SYSTEMZ \
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SUBTARGET_MSP430 \
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SUBTARGET_SPARC \
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SUBTARGET_HEXAGON
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SUBTARGET_HEXAGON \
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SUBTARGET_RISCV \
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#define SUBTARGET(x) \
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namespace llvm { \
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