remove simd_fpow and simd_fpowi

compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs

@@ -460,64 +460,6 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
             });
         }
 
-        sym::simd_fpow => {
-            intrinsic_args!(fx, args => (a, b); intrinsic);
-
-            if !a.layout().ty.is_simd() {
-                report_simd_type_validation_error(fx, intrinsic, span, a.layout().ty);
-                return;
-            }
-
-            simd_pair_for_each_lane(fx, a, b, ret, &|fx, lane_ty, _ret_lane_ty, a_lane, b_lane| {
-                match lane_ty.kind() {
-                    ty::Float(FloatTy::F32) => fx.lib_call(
-                        "powf",
-                        vec![AbiParam::new(types::F32), AbiParam::new(types::F32)],
-                        vec![AbiParam::new(types::F32)],
-                        &[a_lane, b_lane],
-                    )[0],
-                    ty::Float(FloatTy::F64) => fx.lib_call(
-                        "pow",
-                        vec![AbiParam::new(types::F64), AbiParam::new(types::F64)],
-                        vec![AbiParam::new(types::F64)],
-                        &[a_lane, b_lane],
-                    )[0],
-                    _ => unreachable!("{:?}", lane_ty),
-                }
-            });
-        }
-
-        sym::simd_fpowi => {
-            intrinsic_args!(fx, args => (a, exp); intrinsic);
-            let exp = exp.load_scalar(fx);
-
-            if !a.layout().ty.is_simd() {
-                report_simd_type_validation_error(fx, intrinsic, span, a.layout().ty);
-                return;
-            }
-
-            simd_for_each_lane(
-                fx,
-                a,
-                ret,
-                &|fx, lane_ty, _ret_lane_ty, lane| match lane_ty.kind() {
-                    ty::Float(FloatTy::F32) => fx.lib_call(
-                        "__powisf2", // compiler-builtins
-                        vec![AbiParam::new(types::F32), AbiParam::new(types::I32)],
-                        vec![AbiParam::new(types::F32)],
-                        &[lane, exp],
-                    )[0],
-                    ty::Float(FloatTy::F64) => fx.lib_call(
-                        "__powidf2", // compiler-builtins
-                        vec![AbiParam::new(types::F64), AbiParam::new(types::I32)],
-                        vec![AbiParam::new(types::F64)],
-                        &[lane, exp],
-                    )[0],
-                    _ => unreachable!("{:?}", lane_ty),
-                },
-            );
-        }
-
         sym::simd_fsin
         | sym::simd_fcos
         | sym::simd_fexp

compiler/rustc_codegen_gcc/src/intrinsic/simd.rs

@@ -772,8 +772,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             sym::simd_floor => "floor",
             sym::simd_fma => "fma",
             sym::simd_relaxed_fma => "fma", // FIXME: this should relax to non-fused multiply-add when necessary
-            sym::simd_fpowi => "__builtin_powi",
-            sym::simd_fpow => "pow",
             sym::simd_fsin => "sin",
             sym::simd_fsqrt => "sqrt",
             sym::simd_round => "round",
@@ -788,14 +786,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let mut vector_elements = vec![];
         for i in 0..in_len {
             let index = bx.context.new_rvalue_from_long(bx.ulong_type, i as i64);
-            // we have to treat fpowi specially, since fpowi's second argument is always an i32
             let mut arguments = vec![];
-            if name == sym::simd_fpowi {
-                arguments = vec![
-                    bx.extract_element(args[0].immediate(), index).to_rvalue(),
-                    args[1].immediate(),
-                ];
-            } else {
             for arg in args {
                 let mut element = bx.extract_element(arg.immediate(), index).to_rvalue();
                 // FIXME: it would probably be better to not have casts here and use the proper
@@ -805,7 +796,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 }
                 arguments.push(element);
             }
-            };
             let mut result = bx.context.new_call(None, function, &arguments);
             if cast_type.is_some() {
                 result = bx.context.new_cast(None, result, elem_ty);
@@ -829,8 +819,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             | sym::simd_floor
             | sym::simd_fma
             | sym::simd_relaxed_fma
-            | sym::simd_fpow
-            | sym::simd_fpowi
             | sym::simd_fsin
             | sym::simd_fsqrt
             | sym::simd_round

compiler/rustc_codegen_llvm/src/intrinsic.rs

@@ -1587,8 +1587,6 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
             sym::simd_floor => ("floor", bx.type_func(&[vec_ty], vec_ty)),
             sym::simd_fma => ("fma", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
             sym::simd_relaxed_fma => ("fmuladd", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
-            sym::simd_fpowi => ("powi", bx.type_func(&[vec_ty, bx.type_i32()], vec_ty)),
-            sym::simd_fpow => ("pow", bx.type_func(&[vec_ty, vec_ty], vec_ty)),
             sym::simd_fsin => ("sin", bx.type_func(&[vec_ty], vec_ty)),
             sym::simd_fsqrt => ("sqrt", bx.type_func(&[vec_ty], vec_ty)),
             sym::simd_round => ("round", bx.type_func(&[vec_ty], vec_ty)),
@@ -1621,8 +1619,6 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
             | sym::simd_flog
             | sym::simd_floor
             | sym::simd_fma
-            | sym::simd_fpow
-            | sym::simd_fpowi
             | sym::simd_fsin
             | sym::simd_fsqrt
             | sym::simd_relaxed_fma

compiler/rustc_hir_analysis/src/check/intrinsic.rs

@@ -651,7 +651,6 @@ pub fn check_intrinsic_type(
             | sym::simd_xor
             | sym::simd_fmin
             | sym::simd_fmax
-            | sym::simd_fpow
             | sym::simd_saturating_add
             | sym::simd_saturating_sub => (1, 0, vec![param(0), param(0)], param(0)),
             sym::simd_arith_offset => (2, 0, vec![param(0), param(1)], param(0)),
@@ -674,7 +673,6 @@ pub fn check_intrinsic_type(
             | sym::simd_floor
             | sym::simd_round
             | sym::simd_trunc => (1, 0, vec![param(0)], param(0)),
-            sym::simd_fpowi => (1, 0, vec![param(0), tcx.types.i32], param(0)),
             sym::simd_fma | sym::simd_relaxed_fma => {
                 (1, 0, vec![param(0), param(0), param(0)], param(0))
             }

compiler/rustc_span/src/symbol.rs

@@ -1886,8 +1886,6 @@ symbols! {
         simd_fma,
         simd_fmax,
         simd_fmin,
-        simd_fpow,
-        simd_fpowi,
         simd_fsin,
         simd_fsqrt,
         simd_gather,

tests/codegen/simd-intrinsic/simd-intrinsic-float-pow.rs

@@ -1,87 +0,0 @@
-//@ compile-flags: -C no-prepopulate-passes
-
-#![crate_type = "lib"]
-
-#![feature(repr_simd, intrinsics)]
-#![allow(non_camel_case_types)]
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
-
-extern "rust-intrinsic" {
-    fn simd_fpow<T>(x: T, b: T) -> T;
-}
-
-// CHECK-LABEL: @fpow_32x2
-#[no_mangle]
-pub unsafe fn fpow_32x2(a: f32x2, b: f32x2) -> f32x2 {
-    // CHECK: call <2 x float> @llvm.pow.v2f32
-    simd_fpow(a, b)
-}
-
-// CHECK-LABEL: @fpow_32x4
-#[no_mangle]
-pub unsafe fn fpow_32x4(a: f32x4, b: f32x4) -> f32x4 {
-    // CHECK: call <4 x float> @llvm.pow.v4f32
-    simd_fpow(a, b)
-}
-
-// CHECK-LABEL: @fpow_32x8
-#[no_mangle]
-pub unsafe fn fpow_32x8(a: f32x8, b: f32x8) -> f32x8 {
-    // CHECK: call <8 x float> @llvm.pow.v8f32
-    simd_fpow(a, b)
-}
-
-// CHECK-LABEL: @fpow_32x16
-#[no_mangle]
-pub unsafe fn fpow_32x16(a: f32x16, b: f32x16) -> f32x16 {
-    // CHECK: call <16 x float> @llvm.pow.v16f32
-    simd_fpow(a, b)
-}
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
-// CHECK-LABEL: @fpow_64x4
-#[no_mangle]
-pub unsafe fn fpow_64x4(a: f64x4, b: f64x4) -> f64x4 {
-    // CHECK: call <4 x double> @llvm.pow.v4f64
-    simd_fpow(a, b)
-}
-
-// CHECK-LABEL: @fpow_64x2
-#[no_mangle]
-pub unsafe fn fpow_64x2(a: f64x2, b: f64x2) -> f64x2 {
-    // CHECK: call <2 x double> @llvm.pow.v2f64
-    simd_fpow(a, b)
-}
-
-// CHECK-LABEL: @fpow_64x8
-#[no_mangle]
-pub unsafe fn fpow_64x8(a: f64x8, b: f64x8) -> f64x8 {
-    // CHECK: call <8 x double> @llvm.pow.v8f64
-    simd_fpow(a, b)
-}

tests/codegen/simd-intrinsic/simd-intrinsic-float-powi.rs

@@ -1,87 +0,0 @@
-//@ compile-flags: -C no-prepopulate-passes
-
-#![crate_type = "lib"]
-
-#![feature(repr_simd, intrinsics)]
-#![allow(non_camel_case_types)]
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x2(pub [f32; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x4(pub [f32; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x8(pub [f32; 8]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f32x16(pub [f32; 16]);
-
-extern "rust-intrinsic" {
-    fn simd_fpowi<T>(x: T, b: i32) -> T;
-}
-
-// CHECK-LABEL: @fpowi_32x2
-#[no_mangle]
-pub unsafe fn fpowi_32x2(a: f32x2, b: i32) -> f32x2 {
-    // CHECK: call <2 x float> @llvm.powi.v2f32
-    simd_fpowi(a, b)
-}
-
-// CHECK-LABEL: @fpowi_32x4
-#[no_mangle]
-pub unsafe fn fpowi_32x4(a: f32x4, b: i32) -> f32x4 {
-    // CHECK: call <4 x float> @llvm.powi.v4f32
-    simd_fpowi(a, b)
-}
-
-// CHECK-LABEL: @fpowi_32x8
-#[no_mangle]
-pub unsafe fn fpowi_32x8(a: f32x8, b: i32) -> f32x8 {
-    // CHECK: call <8 x float> @llvm.powi.v8f32
-    simd_fpowi(a, b)
-}
-
-// CHECK-LABEL: @fpowi_32x16
-#[no_mangle]
-pub unsafe fn fpowi_32x16(a: f32x16, b: i32) -> f32x16 {
-    // CHECK: call <16 x float> @llvm.powi.v16f32
-    simd_fpowi(a, b)
-}
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x2(pub [f64; 2]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x4(pub [f64; 4]);
-
-#[repr(simd)]
-#[derive(Copy, Clone, PartialEq, Debug)]
-pub struct f64x8(pub [f64; 8]);
-
-// CHECK-LABEL: @fpowi_64x4
-#[no_mangle]
-pub unsafe fn fpowi_64x4(a: f64x4, b: i32) -> f64x4 {
-    // CHECK: call <4 x double> @llvm.powi.v4f64
-    simd_fpowi(a, b)
-}
-
-// CHECK-LABEL: @fpowi_64x2
-#[no_mangle]
-pub unsafe fn fpowi_64x2(a: f64x2, b: i32) -> f64x2 {
-    // CHECK: call <2 x double> @llvm.powi.v2f64
-    simd_fpowi(a, b)
-}
-
-// CHECK-LABEL: @fpowi_64x8
-#[no_mangle]
-pub unsafe fn fpowi_64x8(a: f64x8, b: i32) -> f64x8 {
-    // CHECK: call <8 x double> @llvm.powi.v8f64
-    simd_fpowi(a, b)
-}

tests/ui/simd/intrinsic/float-math-pass.rs

@@ -48,13 +48,6 @@ unsafe fn simd_flog10<T>(x: T) -> T;
 #[rustc_intrinsic]
 unsafe fn simd_flog2<T>(x: T) -> T;
 
-#[rustc_intrinsic]
-unsafe fn simd_fpow<T>(x: T, y: T) -> T;
-
-#[rustc_intrinsic]
-unsafe fn simd_fpowi<T>(x: T, y: i32) -> T;
-
-
 // rounding functions
 #[rustc_intrinsic]
 unsafe fn simd_ceil<T>(x: T) -> T;
@@ -68,23 +61,21 @@ unsafe fn simd_round<T>(x: T) -> T;
 #[rustc_intrinsic]
 unsafe fn simd_trunc<T>(x: T) -> T;
 
-
 macro_rules! assert_approx_eq_f32 {
-    ($a:expr, $b:expr) => ({
+    ($a:expr, $b:expr) => {{
         let (a, b) = (&$a, &$b);
-        assert!((*a - *b).abs() < 1.0e-6,
+        assert!((*a - *b).abs() < 1.0e-6, "{} is not approximately equal to {}", *a, *b);
-                "{} is not approximately equal to {}", *a, *b);
+    }};
-    })
 }
 macro_rules! assert_approx_eq {
-    ($a:expr, $b:expr) => ({
+    ($a:expr, $b:expr) => {{
         let a = $a;
         let b = $b;
         assert_approx_eq_f32!(a.0[0], b.0[0]);
         assert_approx_eq_f32!(a.0[1], b.0[1]);
         assert_approx_eq_f32!(a.0[2], b.0[2]);
         assert_approx_eq_f32!(a.0[3], b.0[3]);
-    })
+    }};
 }
 
 fn main() {
@@ -125,12 +116,6 @@ fn main() {
         let r = simd_flog10(x);
         assert_approx_eq!(z, r);
 
-        let r = simd_fpow(h, x);
-        assert_approx_eq!(h, r);
-
-        let r = simd_fpowi(h, 1);
-        assert_approx_eq!(h, r);
-
         let r = simd_fsin(z);
         assert_approx_eq!(z, r);