Rollup merge of #121841 - tgross35:f16-f128-step2-intrinsics, r=compiler-errors
`f16` and `f128` step 2: intrinsics Continuation of https://github.com/rust-lang/rust/pull/121728, another portion of https://github.com/rust-lang/rust/pull/114607. This PR adds `f16` and `f128` intrinsics, and hooks them up to both HIR and LLVM. This is all still unexposed to the frontend, which will probably be the next step. Also update itanium mangling per `@rcvalle's` in https://github.com/rust-lang/rust/pull/121728/files#r1506570300, and fix a typo from step 1. Once these types are usable in code, I will add the codegen tests from #114607 (codegen is passing on that branch) This does add more `unimplemented!`s to Clippy, but I still don't think we can do better until library support is added. r? `@compiler-errors` cc `@Nilstrieb` `@rustbot` label +T-compiler +F-f16_and_f128
This commit is contained in:
Guillaume Boisseau
GitHub
commit
4c65eef269
14 changed files with 273 additions and 10 deletions
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@ -685,8 +685,10 @@ impl<'ll> CodegenCx<'ll, '_> {
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let t_i64 = self.type_i64();
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let t_i128 = self.type_i128();
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let t_isize = self.type_isize();
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let t_f16 = self.type_f16();
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let t_f32 = self.type_f32();
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let t_f64 = self.type_f64();
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let t_f128 = self.type_f128();
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let t_metadata = self.type_metadata();
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let t_token = self.type_token();
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@ -728,69 +730,115 @@ impl<'ll> CodegenCx<'ll, '_> {
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ifn!("llvm.debugtrap", fn() -> void);
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ifn!("llvm.frameaddress", fn(t_i32) -> ptr);
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ifn!("llvm.powi.f16", fn(t_f16, t_i32) -> t_f16);
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ifn!("llvm.powi.f32", fn(t_f32, t_i32) -> t_f32);
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ifn!("llvm.powi.f64", fn(t_f64, t_i32) -> t_f64);
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ifn!("llvm.powi.f128", fn(t_f128, t_i32) -> t_f128);
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ifn!("llvm.pow.f16", fn(t_f16, t_f16) -> t_f16);
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ifn!("llvm.pow.f32", fn(t_f32, t_f32) -> t_f32);
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ifn!("llvm.pow.f64", fn(t_f64, t_f64) -> t_f64);
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ifn!("llvm.pow.f128", fn(t_f128, t_f128) -> t_f128);
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ifn!("llvm.sqrt.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.sqrt.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.sqrt.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.sqrt.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.sin.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.sin.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.sin.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.sin.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.cos.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.cos.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.cos.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.cos.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.exp.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.exp.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.exp.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.exp.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.exp2.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.exp2.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.exp2.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.exp2.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.log.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.log.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.log.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.log.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.log10.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.log10.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.log10.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.log10.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.log2.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.log2.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.log2.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.log2.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.fma.f16", fn(t_f16, t_f16, t_f16) -> t_f16);
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ifn!("llvm.fma.f32", fn(t_f32, t_f32, t_f32) -> t_f32);
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ifn!("llvm.fma.f64", fn(t_f64, t_f64, t_f64) -> t_f64);
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ifn!("llvm.fma.f128", fn(t_f128, t_f128, t_f128) -> t_f128);
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ifn!("llvm.fabs.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.fabs.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.fabs.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.fabs.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.minnum.f16", fn(t_f16, t_f16) -> t_f16);
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ifn!("llvm.minnum.f32", fn(t_f32, t_f32) -> t_f32);
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ifn!("llvm.minnum.f64", fn(t_f64, t_f64) -> t_f64);
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ifn!("llvm.minnum.f128", fn(t_f128, t_f128) -> t_f128);
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ifn!("llvm.maxnum.f16", fn(t_f16, t_f16) -> t_f16);
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ifn!("llvm.maxnum.f32", fn(t_f32, t_f32) -> t_f32);
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ifn!("llvm.maxnum.f64", fn(t_f64, t_f64) -> t_f64);
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ifn!("llvm.maxnum.f128", fn(t_f128, t_f128) -> t_f128);
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ifn!("llvm.floor.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.floor.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.floor.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.floor.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.ceil.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.ceil.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.ceil.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.ceil.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.trunc.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.trunc.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.trunc.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.trunc.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.copysign.f16", fn(t_f16, t_f16) -> t_f16);
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ifn!("llvm.copysign.f32", fn(t_f32, t_f32) -> t_f32);
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ifn!("llvm.copysign.f64", fn(t_f64, t_f64) -> t_f64);
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ifn!("llvm.copysign.f128", fn(t_f128, t_f128) -> t_f128);
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ifn!("llvm.round.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.round.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.round.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.round.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.roundeven.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.roundeven.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.roundeven.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.roundeven.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.rint.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.rint.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.rint.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.rint.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.nearbyint.f16", fn(t_f16) -> t_f16);
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ifn!("llvm.nearbyint.f32", fn(t_f32) -> t_f32);
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ifn!("llvm.nearbyint.f64", fn(t_f64) -> t_f64);
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ifn!("llvm.nearbyint.f128", fn(t_f128) -> t_f128);
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ifn!("llvm.ctpop.i8", fn(t_i8) -> t_i8);
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ifn!("llvm.ctpop.i16", fn(t_i16) -> t_i16);
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@ -695,7 +695,7 @@ impl MsvcBasicName for ty::UintTy {
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impl MsvcBasicName for ty::FloatTy {
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fn msvc_basic_name(self) -> &'static str {
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// FIXME: f16 and f128 have no MSVE representation. We could improve the debuginfo.
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// FIXME: f16 and f128 have no MSVC representation. We could improve the debuginfo.
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// See: <https://github.com/rust-lang/rust/pull/114607/files#r1454683264>
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match self {
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ty::FloatTy::F16 => "half",
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@ -28,51 +28,118 @@ fn get_simple_intrinsic<'ll>(
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name: Symbol,
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) -> Option<(&'ll Type, &'ll Value)> {
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let llvm_name = match name {
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sym::sqrtf16 => "llvm.sqrt.f16",
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sym::sqrtf32 => "llvm.sqrt.f32",
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sym::sqrtf64 => "llvm.sqrt.f64",
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sym::sqrtf128 => "llvm.sqrt.f128",
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sym::powif16 => "llvm.powi.f16",
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sym::powif32 => "llvm.powi.f32",
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sym::powif64 => "llvm.powi.f64",
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sym::powif128 => "llvm.powi.f128",
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sym::sinf16 => "llvm.sin.f16",
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sym::sinf32 => "llvm.sin.f32",
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sym::sinf64 => "llvm.sin.f64",
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sym::sinf128 => "llvm.sin.f128",
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sym::cosf16 => "llvm.cos.f16",
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sym::cosf32 => "llvm.cos.f32",
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sym::cosf64 => "llvm.cos.f64",
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sym::cosf128 => "llvm.cos.f128",
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sym::powf16 => "llvm.pow.f16",
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sym::powf32 => "llvm.pow.f32",
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sym::powf64 => "llvm.pow.f64",
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sym::powf128 => "llvm.pow.f128",
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sym::expf16 => "llvm.exp.f16",
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sym::expf32 => "llvm.exp.f32",
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sym::expf64 => "llvm.exp.f64",
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sym::expf128 => "llvm.exp.f128",
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sym::exp2f16 => "llvm.exp2.f16",
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sym::exp2f32 => "llvm.exp2.f32",
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sym::exp2f64 => "llvm.exp2.f64",
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sym::exp2f128 => "llvm.exp2.f128",
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sym::logf16 => "llvm.log.f16",
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sym::logf32 => "llvm.log.f32",
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sym::logf64 => "llvm.log.f64",
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sym::logf128 => "llvm.log.f128",
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sym::log10f16 => "llvm.log10.f16",
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sym::log10f32 => "llvm.log10.f32",
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sym::log10f64 => "llvm.log10.f64",
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sym::log10f128 => "llvm.log10.f128",
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sym::log2f16 => "llvm.log2.f16",
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sym::log2f32 => "llvm.log2.f32",
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sym::log2f64 => "llvm.log2.f64",
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sym::log2f128 => "llvm.log2.f128",
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sym::fmaf16 => "llvm.fma.f16",
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sym::fmaf32 => "llvm.fma.f32",
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sym::fmaf64 => "llvm.fma.f64",
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sym::fmaf128 => "llvm.fma.f128",
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sym::fabsf16 => "llvm.fabs.f16",
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sym::fabsf32 => "llvm.fabs.f32",
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sym::fabsf64 => "llvm.fabs.f64",
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sym::fabsf128 => "llvm.fabs.f128",
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sym::minnumf16 => "llvm.minnum.f16",
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sym::minnumf32 => "llvm.minnum.f32",
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sym::minnumf64 => "llvm.minnum.f64",
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sym::minnumf128 => "llvm.minnum.f128",
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sym::maxnumf16 => "llvm.maxnum.f16",
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sym::maxnumf32 => "llvm.maxnum.f32",
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sym::maxnumf64 => "llvm.maxnum.f64",
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sym::maxnumf128 => "llvm.maxnum.f128",
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sym::copysignf16 => "llvm.copysign.f16",
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sym::copysignf32 => "llvm.copysign.f32",
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sym::copysignf64 => "llvm.copysign.f64",
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sym::copysignf128 => "llvm.copysign.f128",
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sym::floorf16 => "llvm.floor.f16",
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sym::floorf32 => "llvm.floor.f32",
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sym::floorf64 => "llvm.floor.f64",
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sym::floorf128 => "llvm.floor.f128",
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sym::ceilf16 => "llvm.ceil.f16",
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sym::ceilf32 => "llvm.ceil.f32",
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sym::ceilf64 => "llvm.ceil.f64",
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sym::ceilf128 => "llvm.ceil.f128",
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sym::truncf16 => "llvm.trunc.f16",
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sym::truncf32 => "llvm.trunc.f32",
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sym::truncf64 => "llvm.trunc.f64",
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sym::truncf128 => "llvm.trunc.f128",
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sym::rintf16 => "llvm.rint.f16",
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sym::rintf32 => "llvm.rint.f32",
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sym::rintf64 => "llvm.rint.f64",
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sym::rintf128 => "llvm.rint.f128",
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sym::nearbyintf16 => "llvm.nearbyint.f16",
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sym::nearbyintf32 => "llvm.nearbyint.f32",
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sym::nearbyintf64 => "llvm.nearbyint.f64",
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sym::nearbyintf128 => "llvm.nearbyint.f128",
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sym::roundf16 => "llvm.round.f16",
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sym::roundf32 => "llvm.round.f32",
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sym::roundf64 => "llvm.round.f64",
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sym::roundf128 => "llvm.round.f128",
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sym::ptr_mask => "llvm.ptrmask",
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sym::roundevenf16 => "llvm.roundeven.f16",
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sym::roundevenf32 => "llvm.roundeven.f32",
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sym::roundevenf64 => "llvm.roundeven.f64",
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sym::roundevenf128 => "llvm.roundeven.f128",
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_ => return None,
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};
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Some(cx.get_intrinsic(llvm_name))
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