Update other test results
This commit is contained in:
Jannis Christopher Köhl
parent
8a789ce009
commit
469fb197d0
3 changed files with 238 additions and 4 deletions
117
src/test/mir-opt/issue_73223.main.PreCodegen.32bit.diff
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117
src/test/mir-opt/issue_73223.main.PreCodegen.32bit.diff
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@ -0,0 +1,117 @@
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- // MIR for `main` before PreCodegen
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+ // MIR for `main` after PreCodegen
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fn main() -> () {
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let mut _0: (); // return place in scope 0 at $DIR/issue-73223.rs:+0:11: +0:11
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let _1: i32; // in scope 0 at $DIR/issue-73223.rs:+1:9: +1:14
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let mut _2: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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let _3: i32; // in scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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let mut _5: (&i32, &i32); // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _6: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _7: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _10: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _11: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _12: i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _14: !; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _15: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _16: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _17: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _18: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _19: std::option::Option<std::fmt::Arguments>; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 1 {
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debug split => _1; // in scope 1 at $DIR/issue-73223.rs:+1:9: +1:14
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let _4: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:+6:9: +6:14
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scope 3 {
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debug _prev => _4; // in scope 3 at $DIR/issue-73223.rs:+6:9: +6:14
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let _8: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _9: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _20: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 4 {
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debug left_val => _8; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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debug right_val => _9; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _13: core::panicking::AssertKind; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 5 {
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debug kind => _13; // in scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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}
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}
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}
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}
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scope 2 {
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debug v => _3; // in scope 2 at $DIR/issue-73223.rs:+2:14: +2:15
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}
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bb0: {
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StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:+1:9: +1:14
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StorageLive(_2); // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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Deinit(_2); // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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((_2 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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discriminant(_2) = 1; // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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StorageLive(_3); // scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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_3 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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_1 = _3; // scope 2 at $DIR/issue-73223.rs:+2:20: +2:21
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StorageDead(_3); // scope 0 at $DIR/issue-73223.rs:+2:20: +2:21
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StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:+4:6: +4:7
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StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:+6:9: +6:14
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StorageLive(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_6 = &_1; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_20 = const main::promoted[0]; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// mir::Constant
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// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// + literal: Const { ty: &i32, val: Unevaluated(main, [], Some(promoted[0])) }
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_7 = _20; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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Deinit(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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(_5.0: &i32) = move _6; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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(_5.1: &i32) = move _7; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_8 = (_5.0: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_9 = (_5.1: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_12 = (*_8); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_11 = Eq(move _12, const 1_i32); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_10 = Not(move _11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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switchInt(move _10) -> [false: bb2, otherwise: bb1]; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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}
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bb1: {
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StorageLive(_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_14); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_15); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_16); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_16 = _8; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_15 = _16; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_17); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_18); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_18 = _9; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_17 = _18; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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Deinit(_19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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discriminant(_19) = 0; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_14 = core::panicking::assert_failed::<i32, i32>(const core::panicking::AssertKind::Eq, move _15, move _17, move _19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// mir::Constant
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// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// + literal: Const { ty: for<'r, 's, 't0> fn(core::panicking::AssertKind, &'r i32, &'s i32, Option<Arguments<'t0>>) -> ! {core::panicking::assert_failed::<i32, i32>}, val: Value(<ZST>) }
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// mir::Constant
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// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// + literal: Const { ty: core::panicking::AssertKind, val: Value(Scalar(0x00)) }
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}
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bb2: {
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StorageDead(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:+8:1: +8:2
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StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:+8:1: +8:2
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return; // scope 0 at $DIR/issue-73223.rs:+8:2: +8:2
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}
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}
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117
src/test/mir-opt/issue_73223.main.PreCodegen.64bit.diff
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117
src/test/mir-opt/issue_73223.main.PreCodegen.64bit.diff
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@ -0,0 +1,117 @@
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- // MIR for `main` before PreCodegen
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+ // MIR for `main` after PreCodegen
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fn main() -> () {
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let mut _0: (); // return place in scope 0 at $DIR/issue-73223.rs:+0:11: +0:11
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let _1: i32; // in scope 0 at $DIR/issue-73223.rs:+1:9: +1:14
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let mut _2: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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let _3: i32; // in scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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let mut _5: (&i32, &i32); // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _6: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _7: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _10: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _11: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _12: i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _14: !; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _15: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _16: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _17: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _18: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _19: std::option::Option<std::fmt::Arguments>; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 1 {
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debug split => _1; // in scope 1 at $DIR/issue-73223.rs:+1:9: +1:14
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let _4: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:+6:9: +6:14
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scope 3 {
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debug _prev => _4; // in scope 3 at $DIR/issue-73223.rs:+6:9: +6:14
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let _8: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _9: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let mut _20: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 4 {
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debug left_val => _8; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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debug right_val => _9; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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let _13: core::panicking::AssertKind; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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scope 5 {
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debug kind => _13; // in scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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}
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}
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}
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}
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scope 2 {
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debug v => _3; // in scope 2 at $DIR/issue-73223.rs:+2:14: +2:15
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}
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bb0: {
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StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:+1:9: +1:14
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StorageLive(_2); // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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Deinit(_2); // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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((_2 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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discriminant(_2) = 1; // scope 0 at $DIR/issue-73223.rs:+1:23: +1:30
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StorageLive(_3); // scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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_3 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:+2:14: +2:15
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_1 = _3; // scope 2 at $DIR/issue-73223.rs:+2:20: +2:21
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StorageDead(_3); // scope 0 at $DIR/issue-73223.rs:+2:20: +2:21
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StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:+4:6: +4:7
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StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:+6:9: +6:14
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StorageLive(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_6 = &_1; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_20 = const main::promoted[0]; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// mir::Constant
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// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
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// + literal: Const { ty: &i32, val: Unevaluated(main, [], Some(promoted[0])) }
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_7 = _20; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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Deinit(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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(_5.0: &i32) = move _6; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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(_5.1: &i32) = move _7; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_8 = (_5.0: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_9 = (_5.1: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_12 = (*_8); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_11 = Eq(move _12, const 1_i32); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_10 = Not(move _11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageDead(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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switchInt(move _10) -> [false: bb2, otherwise: bb1]; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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}
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bb1: {
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StorageLive(_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_14); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_15); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_16); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_16 = _8; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_15 = _16; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_17); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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StorageLive(_18); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_18 = _9; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
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_17 = _18; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
StorageLive(_19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
Deinit(_19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
discriminant(_19) = 0; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
_14 = core::panicking::assert_failed::<i32, i32>(const core::panicking::AssertKind::Eq, move _15, move _17, move _19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
// mir::Constant
|
||||||
|
// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
// + literal: Const { ty: for<'r, 's, 't0> fn(core::panicking::AssertKind, &'r i32, &'s i32, Option<Arguments<'t0>>) -> ! {core::panicking::assert_failed::<i32, i32>}, val: Value(<ZST>) }
|
||||||
|
// mir::Constant
|
||||||
|
// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
// + literal: Const { ty: core::panicking::AssertKind, val: Value(Scalar(0x00)) }
|
||||||
|
}
|
||||||
|
|
||||||
|
bb2: {
|
||||||
|
StorageDead(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
StorageDead(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
StorageDead(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
StorageDead(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
|
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:+8:1: +8:2
|
||||||
|
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:+8:1: +8:2
|
||||||
|
return; // scope 0 at $DIR/issue-73223.rs:+8:2: +8:2
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -104,15 +104,15 @@
|
||||||
StorageLive(_15); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageLive(_15); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageLive(_16); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageLive(_16); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageLive(_17); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageLive(_17); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
_17 = const 1_i32; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
_17 = (*_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageLive(_18); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageLive(_18); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
_18 = const 1_i32; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
_18 = const 1_i32; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
_16 = const true; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
_16 = Eq(move _17, const 1_i32); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageDead(_18); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageDead(_18); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageDead(_17); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageDead(_17); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
_15 = const false; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
_15 = Not(move _16); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
StorageDead(_16); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
StorageDead(_16); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
goto -> bb5; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
switchInt(move _15) -> [false: bb5, otherwise: bb4]; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
|
||||||
}
|
}
|
||||||
|
|
||||||
bb4: {
|
bb4: {
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue