Auto merge of #62281 - Disasm:riscv-pic, r=nagisa

Add support for pc-relative addressing on 64-bit RISC-V

These changes allow Rust to generate position-independent code on `riscv64` targets with code model `medium`.

Closes: https://github.com/rust-lang/rust/issues/59802
See also: https://github.com/rust-embedded/riscv-rt/issues/25, https://github.com/rust-embedded/wg/issues/218

src/librustc_target/spec/riscv64gc_unknown_none_elf.rs

@@ -23,6 +23,7 @@ pub fn target() -> TargetResult {
             executables: true,
             panic_strategy: PanicStrategy::Abort,
             relocation_model: "static".to_string(),
+            code_model: Some("medium".to_string()),
             emit_debug_gdb_scripts: false,
             abi_blacklist: super::riscv_base::abi_blacklist(),
             eliminate_frame_pointer: false,

src/librustc_target/spec/riscv64imac_unknown_none_elf.rs

@@ -23,6 +23,7 @@ pub fn target() -> TargetResult {
             executables: true,
             panic_strategy: PanicStrategy::Abort,
             relocation_model: "static".to_string(),
+            code_model: Some("medium".to_string()),
             emit_debug_gdb_scripts: false,
             abi_blacklist: super::riscv_base::abi_blacklist(),
             eliminate_frame_pointer: false,

src/llvm-project

@@ -1 +1 @@
-Subproject commit 1bbe0b3e1d756116cbf1fcf049555066ef929008
+Subproject commit 8538d56b2dd450063547a7690f7ffa2ac37c9c65