Rollup merge of #133463 - taiki-e:aarch64-asm-x18, r=Amanieu
Fix handling of x18 in AArch64 inline assembly on ohos/trusty or with -Zfixed-x18 Currently AArch64 inline assembly allows using x18 on ohos/trusty or with -Zfixed-x18.7db7489f9b/compiler/rustc_target/src/asm/aarch64.rs (L74-L76)
However, x18 is reserved in these environments and should not be allowed in the input/output operands of inline assemblies as it is in Android, Windows, etc..7db7489f9b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_ohos.rs (L19)
7db7489f9b/compiler/rustc_target/src/spec/targets/aarch64_unknown_trusty.rs (L18)
7db7489f9b/compiler/rustc_codegen_llvm/src/llvm_util.rs (L764-L771)
(As for ohos, +reserve-x18 is [redundant](c417b7a695 (diff-0ddf23e0bf2b28b2d05f842f087d1e6f694e8e06d1765e8d0f10d47fddcdff9c)
) since7a966b9188
that starting using llvm's ohos targets. So removed it from target-spec.) This fix may potentially break the code for tier 2 target (aarch64-unknown-linux-ohos). (As for others, aarch64-unknown-trusty is tier 3 and -Zfixed-x18 is unstable so breaking them should be fine.) However, in any case, it seems suspicious that the code that is broken by this was sound. r? `@Amanieu` `@rustbot` label O-AArch64 +A-inline-assembly
This commit is contained in:
commit
23bab15d73
9 changed files with 80 additions and 49 deletions
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@ -1,7 +1,7 @@
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use std::fmt;
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use rustc_data_structures::fx::FxIndexSet;
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use rustc_span::Symbol;
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use rustc_span::{Symbol, sym};
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use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
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use crate::spec::{RelocModel, Target};
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@ -71,18 +71,26 @@ impl AArch64InlineAsmRegClass {
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}
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}
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pub(crate) fn target_reserves_x18(target: &Target) -> bool {
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target.os == "android" || target.os == "fuchsia" || target.is_like_osx || target.is_like_windows
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pub(crate) fn target_reserves_x18(target: &Target, target_features: &FxIndexSet<Symbol>) -> bool {
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// See isX18ReservedByDefault in LLVM for targets reserve x18 by default:
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// https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/TargetParser/AArch64TargetParser.cpp#L102-L105
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// Note that +reserve-x18 is currently not set for the above targets.
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target.os == "android"
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|| target.os == "fuchsia"
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|| target.env == "ohos"
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|| target.is_like_osx
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|| target.is_like_windows
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|| target_features.contains(&sym::reserve_x18)
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}
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fn reserved_x18(
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_arch: InlineAsmArch,
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_reloc_model: RelocModel,
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_target_features: &FxIndexSet<Symbol>,
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target_features: &FxIndexSet<Symbol>,
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target: &Target,
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_is_clobber: bool,
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) -> Result<(), &'static str> {
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if target_reserves_x18(target) {
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if target_reserves_x18(target, target_features) {
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Err("x18 is a reserved register on this target")
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} else {
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Ok(())
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@ -965,11 +965,13 @@ impl InlineAsmClobberAbi {
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_ => Err(&["C", "system", "efiapi", "aapcs"]),
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},
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InlineAsmArch::AArch64 => match name {
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"C" | "system" | "efiapi" => Ok(if aarch64::target_reserves_x18(target) {
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InlineAsmClobberAbi::AArch64NoX18
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} else {
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InlineAsmClobberAbi::AArch64
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}),
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"C" | "system" | "efiapi" => {
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Ok(if aarch64::target_reserves_x18(target, target_features) {
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InlineAsmClobberAbi::AArch64NoX18
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} else {
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InlineAsmClobberAbi::AArch64
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})
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}
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_ => Err(&["C", "system", "efiapi"]),
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},
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InlineAsmArch::Arm64EC => match name {
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@ -16,7 +16,6 @@ pub(crate) fn target() -> Target {
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data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
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arch: "aarch64".into(),
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options: TargetOptions {
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features: "+reserve-x18".into(),
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mcount: "\u{1}_mcount".into(),
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stack_probes: StackProbeType::Inline,
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supported_sanitizers: SanitizerSet::ADDRESS
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@ -228,6 +228,12 @@ const AARCH64_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
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("rcpc3", Unstable(sym::aarch64_unstable_target_feature), &["rcpc2"]),
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// FEAT_RDM
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("rdm", Stable, &["neon"]),
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// This is needed for inline assembly, but shouldn't be stabilized as-is
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// since it should be enabled globally using -Zfixed-x18, not
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// #[target_feature].
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// Note that cfg(target_feature = "reserve-x18") is currently not set for
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// targets that reserve x18 by default.
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("reserve-x18", Unstable(sym::aarch64_unstable_target_feature), &[]),
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// FEAT_SB
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("sb", Stable, &[]),
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// FEAT_SHA1 & FEAT_SHA256
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