force_array -> is_consecutive
The actual ABI implication here is that in some cases the values are required to be "consecutive", i.e. must either all be passed in registers or all on stack (without padding). Adjust the code to either use Uniform::new() or Uniform::consecutive() depending on which behavior is needed. Then, when lowering this in LLVM, skip the [1 x i128] to i128 simplification if is_consecutive is set. i128 is the only case I'm aware of where this is problematic right now. If we find other cases, we can extend this (either based on target information or possibly just by not simplifying for is_consecutive entirely).
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13 changed files with 53 additions and 57 deletions
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@ -150,7 +150,10 @@ impl LlvmType for CastTarget {
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// Simplify to a single unit or an array if there's no prefix.
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// This produces the same layout, but using a simpler type.
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if self.prefix.iter().all(|x| x.is_none()) {
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if rest_count == 1 && !self.rest.force_array {
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// We can't do this if is_consecutive is set and the unit would get
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// split on the target. Currently, this is only relevant for i128
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// registers.
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if rest_count == 1 && (!self.rest.is_consecutive || self.rest.unit != Reg::i128()) {
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return rest_ll_unit;
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}
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