bjoernager/rust
bjoernager/rust
1
Fork 0
Code Activity

Use fma(f) libm function for simd_fma intrinsic

Browse source
This commit is contained in:
bjorn3 2022-03-25 20:42:58 +01:00
parent 3c030e2425
commit 11007c02f7
2 changed files with 11 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

20
patches/0001-portable-simd-Disable-unsupported-tests.patch
View file

@ -102,26 +102,6 @@ index 6a8ecd3..68fcb49 100644
} }
} }
} }
diff --git a/crates/core_simd/tests/ops_macros.rs b/crates/core_simd/tests/ops_macros.rs
index 31b7ee2..bd04b3c 100644
--- a/crates/core_simd/tests/ops_macros.rs
+++ b/crates/core_simd/tests/ops_macros.rs
@@ -604,6 +606,7 @@ macro_rules! impl_float_tests {
)
}
+ /*
fn mul_add<const LANES: usize>() {
test_helpers::test_ternary_elementwise(
&Vector::<LANES>::mul_add,
@@ -611,6 +614,7 @@ macro_rules! impl_float_tests {
&|_, _, _| true,
)
}
+ */
}
}
}
-- --
2.26.2.7.g19db9cfb68 2.26.2.7.g19db9cfb68

21
src/intrinsics/simd.rs
View file

@ -322,20 +322,21 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
} }
assert_eq!(a.layout(), b.layout()); assert_eq!(a.layout(), b.layout());
assert_eq!(a.layout(), c.layout()); assert_eq!(a.layout(), c.layout());
let layout = a.layout(); assert_eq!(a.layout(), ret.layout());
let (lane_count, _lane_ty) = layout.ty.simd_size_and_type(fx.tcx); let layout = a.layout();
let (ret_lane_count, ret_lane_ty) = ret.layout().ty.simd_size_and_type(fx.tcx); let (lane_count, lane_ty) = layout.ty.simd_size_and_type(fx.tcx);
assert_eq!(lane_count, ret_lane_count);
let ret_lane_layout = fx.layout_of(ret_lane_ty);
for lane in 0..lane_count { for lane in 0..lane_count {
let a_lane = a.value_lane(fx, lane).load_scalar(fx); let a_lane = a.value_lane(fx, lane);
let b_lane = b.value_lane(fx, lane).load_scalar(fx); let b_lane = b.value_lane(fx, lane);
let c_lane = c.value_lane(fx, lane).load_scalar(fx); let c_lane = c.value_lane(fx, lane);
let mul_lane = fx.bcx.ins().fmul(a_lane, b_lane); let res_lane = match lane_ty.kind() {
let res_lane = CValue::by_val(fx.bcx.ins().fadd(mul_lane, c_lane), ret_lane_layout); ty::Float(FloatTy::F32) => fx.easy_call("fmaf", &[a_lane, b_lane, c_lane], lane_ty),
ty::Float(FloatTy::F64) => fx.easy_call("fma", &[a_lane, b_lane, c_lane], lane_ty),
_ => unreachable!(),
};
ret.place_lane(fx, lane).write_cvalue(fx, res_lane); ret.place_lane(fx, lane).write_cvalue(fx, res_lane);
} }