Add NuttX support for AArch64 and ARMv7-A targets
This patch adds tier 3 support for AArch64 and ARMv7-A targets in NuttX, including: - AArch64 target: aarch64-unknown-nuttx - ARMv7-A target: armv7a-nuttx-eabi, armv7a-nuttx-eabihf - Thumbv7-A target: thumbv7a-nuttx-eabi, thumbv7a-nuttx-eabihf Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
parent
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9 changed files with 230 additions and 2 deletions
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@ -1853,6 +1853,8 @@ supported_targets! {
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("armv7a-none-eabi", armv7a_none_eabi),
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("armv7a-none-eabihf", armv7a_none_eabihf),
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("armv7a-nuttx-eabi", armv7a_nuttx_eabi),
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("armv7a-nuttx-eabihf", armv7a_nuttx_eabihf),
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("msp430-none-elf", msp430_none_elf),
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@ -1896,6 +1898,7 @@ supported_targets! {
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("aarch64-unknown-none", aarch64_unknown_none),
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("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
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("aarch64-unknown-nuttx", aarch64_unknown_nuttx),
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("x86_64-fortanix-unknown-sgx", x86_64_fortanix_unknown_sgx),
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@ -1971,6 +1974,8 @@ supported_targets! {
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("x86_64-unknown-linux-none", x86_64_unknown_linux_none),
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("thumbv6m-nuttx-eabi", thumbv6m_nuttx_eabi),
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("thumbv7a-nuttx-eabi", thumbv7a_nuttx_eabi),
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("thumbv7a-nuttx-eabihf", thumbv7a_nuttx_eabihf),
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("thumbv7m-nuttx-eabi", thumbv7m_nuttx_eabi),
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("thumbv7em-nuttx-eabi", thumbv7em_nuttx_eabi),
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("thumbv7em-nuttx-eabihf", thumbv7em_nuttx_eabihf),
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@ -0,0 +1,46 @@
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// Generic AArch64 target for NuttX OS
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//
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// Can be used in conjunction with the `target-feature` and
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// `target-cpu` compiler flags to opt-in more hardware-specific
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// features.
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//
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// For example, `-C target-cpu=cortex-a53`.
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use crate::spec::{
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Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
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TargetOptions, cvs,
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};
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pub(crate) fn target() -> Target {
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let opts = TargetOptions {
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linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
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linker: Some("rust-lld".into()),
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// Enable the Cortex-A53 errata 843419 mitigation by default
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pre_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::No, Lld::No), &[
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"--fix-cortex-a53-843419",
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]),
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features: "+v8a,+strict-align,+neon,+fp-armv8".into(),
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supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS,
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relocation_model: RelocModel::Static,
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disable_redzone: true,
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max_atomic_width: Some(128),
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stack_probes: StackProbeType::Inline,
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panic_strategy: PanicStrategy::Abort,
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families: cvs!["unix"],
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os: "nuttx".into(),
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..Default::default()
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};
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Target {
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llvm_target: "aarch64-unknown-none".into(),
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metadata: crate::spec::TargetMetadata {
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description: Some("AArch64 NuttX".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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},
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pointer_width: 64,
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data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
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arch: "aarch64".into(),
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options: opts,
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}
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}
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41
compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabi.rs
Normal file
41
compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabi.rs
Normal file
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@ -0,0 +1,41 @@
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) running NuttX
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//
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// This target assumes that the device does NOT have a FPU (Floating Point Unit)
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// and will use software floating point operations. This matches the NuttX EABI
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// configuration without hardware floating point support.
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use crate::spec::{
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Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs,
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};
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pub(crate) fn target() -> Target {
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let opts = TargetOptions {
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abi: "eabi".into(),
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llvm_floatabi: Some(FloatAbi::Soft),
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linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
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linker: Some("rust-lld".into()),
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features: "+v7,+thumb2,+soft-float,-neon,+strict-align".into(),
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relocation_model: RelocModel::Static,
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disable_redzone: true,
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max_atomic_width: Some(64),
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panic_strategy: PanicStrategy::Abort,
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emit_debug_gdb_scripts: false,
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c_enum_min_bits: Some(8),
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families: cvs!["unix"],
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os: "nuttx".into(),
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..Default::default()
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};
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Target {
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llvm_target: "armv7a-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: Some("ARMv7-A Cortex-A with NuttX".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
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arch: "arm".into(),
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options: opts,
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}
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}
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@ -0,0 +1,41 @@
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) running NuttX with hardware floating point
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//
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// This target assumes that the device has a FPU (Floating Point Unit)
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// and will use hardware floating point operations. This matches the NuttX EABI
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// configuration with hardware floating point support.
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use crate::spec::{
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Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs,
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};
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pub(crate) fn target() -> Target {
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let opts = TargetOptions {
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abi: "eabihf".into(),
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llvm_floatabi: Some(FloatAbi::Hard),
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linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
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linker: Some("rust-lld".into()),
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features: "+v7,+thumb2,+vfp3,+neon,+strict-align".into(),
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relocation_model: RelocModel::Static,
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disable_redzone: true,
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max_atomic_width: Some(64),
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panic_strategy: PanicStrategy::Abort,
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emit_debug_gdb_scripts: false,
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c_enum_min_bits: Some(8),
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families: cvs!["unix"],
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os: "nuttx".into(),
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..Default::default()
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};
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Target {
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llvm_target: "armv7a-none-eabihf".into(),
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metadata: crate::spec::TargetMetadata {
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description: Some("ARMv7-A Cortex-A with NuttX (hard float)".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
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arch: "arm".into(),
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options: opts,
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}
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}
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@ -0,0 +1,33 @@
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A)
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//
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// This target assumes that the device does NOT have a FPU (Floating Point Unit)
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// and will use software floating point operations. This matches the NuttX EABI
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// configuration without hardware floating point support.
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use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
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pub(crate) fn target() -> Target {
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Target {
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llvm_target: "thumbv7a-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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host_tools: None,
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std: None,
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
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arch: "arm".into(),
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options: TargetOptions {
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families: cvs!["unix"],
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os: "nuttx".into(),
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abi: "eabi".into(),
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llvm_floatabi: Some(FloatAbi::Soft),
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// Cortex-A7/A8/A9 with software floating point
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features: "+soft-float,-neon".into(),
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max_atomic_width: Some(64),
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..base::thumb::opts()
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},
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}
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}
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@ -0,0 +1,37 @@
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A)
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//
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// This target assumes that the device has a FPU (Floating Point Unit) and lowers all (single
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// precision) floating point operations to hardware instructions. Cortex-A7/A8/A9 processors
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// support VFPv3-D32 or VFPv4-D32 floating point units with optional double-precision support.
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//
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// This target uses the "hard" floating convention (ABI) where floating point values
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// are passed to/from subroutines via FPU registers (S0, S1, D0, D1, etc.).
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use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
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pub(crate) fn target() -> Target {
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Target {
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llvm_target: "thumbv7a-none-eabihf".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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host_tools: None,
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std: None,
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
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arch: "arm".into(),
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options: TargetOptions {
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families: cvs!["unix"],
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os: "nuttx".into(),
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abi: "eabihf".into(),
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llvm_floatabi: Some(FloatAbi::Hard),
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// Cortex-A7/A8/A9 support VFPv3-D32/VFPv4-D32 with optional double-precision
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// and NEON SIMD instructions
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features: "+vfp3,+neon".into(),
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max_atomic_width: Some(64),
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..base::thumb::opts()
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},
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}
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}
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