bjoernager/rust
bjoernager/rust
1
Fork 0
Code Activity

Auto merge of #91224 - couchand:2021-11/avr-asm, r=Amanieu

Browse source 
Support AVR for inline asm!

A first pass at support for the AVR platform in inline `asm!`.  Passes the initial compiler tests, have not yet done more complete verification.

In particular, the register classes could use a lot more fleshing out, this draft PR so far only includes the most basic.

cc `@Amanieu` `@dylanmckay`
This commit is contained in:
bors 2021-12-07 14:23:01 +00:00
commit 0b6f079e49
8 changed files with 549 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

196
compiler/rustc_target/src/asm/avr.rs Normal file
View file

@ -0,0 +1,196 @@
use super::{InlineAsmArch, InlineAsmType};
use rustc_macros::HashStable_Generic;
use std::fmt;
def_reg_class! {
Avr AvrInlineAsmRegClass {
reg,
reg_upper,
reg_pair,
reg_iw,
reg_ptr,
}
}
impl AvrInlineAsmRegClass {
pub fn valid_modifiers(self, _arch: InlineAsmArch) -> &'static [char] {
match self {
Self::reg_pair | Self::reg_iw | Self::reg_ptr => &['h', 'l'],
_ => &[],
}
}
pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
None
}
pub fn suggest_modifier(
self,
_arch: InlineAsmArch,
_ty: InlineAsmType,
) -> Option<(char, &'static str)> {
None
}
pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
None
}
pub fn supported_types(
self,
_arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<&'static str>)] {
match self {
Self::reg => types! { _: I8; },
Self::reg_upper => types! { _: I8; },
Self::reg_pair => types! { _: I16; },
Self::reg_iw => types! { _: I16; },
Self::reg_ptr => types! { _: I16; },
}
}
}
def_regs! {
Avr AvrInlineAsmReg AvrInlineAsmRegClass {
r2: reg = ["r2"],
r3: reg = ["r3"],
r4: reg = ["r4"],
r5: reg = ["r5"],
r6: reg = ["r6"],
r7: reg = ["r7"],
r8: reg = ["r8"],
r9: reg = ["r9"],
r10: reg = ["r10"],
r11: reg = ["r11"],
r12: reg = ["r12"],
r13: reg = ["r13"],
r14: reg = ["r14"],
r15: reg = ["r15"],
r16: reg, reg_upper = ["r16"],
r17: reg, reg_upper = ["r17"],
r18: reg, reg_upper = ["r18"],
r19: reg, reg_upper = ["r19"],
r20: reg, reg_upper = ["r20"],
r21: reg, reg_upper = ["r21"],
r22: reg, reg_upper = ["r22"],
r23: reg, reg_upper = ["r23"],
r24: reg, reg_upper = ["r24"],
r25: reg, reg_upper = ["r25"],
r26: reg, reg_upper = ["r26", "XL"],
r27: reg, reg_upper = ["r27", "XH"],
r30: reg, reg_upper = ["r30", "ZL"],
r31: reg, reg_upper = ["r31", "ZH"],
r3r2: reg_pair = ["r3r2"],
r5r4: reg_pair = ["r5r4"],
r7r6: reg_pair = ["r7r6"],
r9r8: reg_pair = ["r9r8"],
r11r10: reg_pair = ["r11r10"],
r13r12: reg_pair = ["r13r12"],
r15r14: reg_pair = ["r15r14"],
r17r16: reg_pair = ["r17r16"],
r19r18: reg_pair = ["r19r18"],
r21r20: reg_pair = ["r21r20"],
r23r22: reg_pair = ["r23r22"],
r25r24: reg_iw, reg_pair = ["r25r24"],
X: reg_ptr, reg_iw, reg_pair = ["r27r26", "X"],
Z: reg_ptr, reg_iw, reg_pair = ["r31r30", "Z"],
#error = ["Y", "YL", "YH"] =>
"the frame pointer cannot be used as an operand for inline asm",
#error = ["SP", "SPL", "SPH"] =>
"the stack pointer cannot be used as an operand for inline asm",
#error = ["r0", "r1", "r1r0"] =>
"r0 and r1 are not available due to an issue in LLVM",
}
}
macro_rules! emit_pairs {
(
$self:ident $modifier:ident,
$($pair:ident $name:literal $hi:literal $lo:literal,)*
) => {
match ($self, $modifier) {
$(
(AvrInlineAsmReg::$pair, Some('h')) => $hi,
(AvrInlineAsmReg::$pair, Some('l')) => $lo,
(AvrInlineAsmReg::$pair, _) => $name,
)*
_ => $self.name(),
}
};
}
impl AvrInlineAsmReg {
pub fn emit(
self,
out: &mut dyn fmt::Write,
_arch: InlineAsmArch,
modifier: Option<char>,
) -> fmt::Result {
let name = emit_pairs! {
self modifier,
Z "Z" "ZH" "ZL",
X "X" "XH" "XL",
r25r24 "r25:r24" "r25" "r24",
r23r22 "r23:r22" "r23" "r22",
r21r20 "r21:r20" "r21" "r20",
r19r18 "r19:r18" "r19" "r18",
r17r16 "r17:r16" "r17" "r16",
r15r14 "r15:r14" "r15" "r14",
r13r12 "r13:r12" "r13" "r12",
r11r10 "r11:r10" "r11" "r10",
r9r8 "r9:r8" "r9" "r8",
r7r6 "r7:r6" "r7" "r6",
r5r4 "r5:r4" "r5" "r4",
r3r2 "r3:r2" "r3" "r2",
};
out.write_str(name)
}
pub fn overlapping_regs(self, mut cb: impl FnMut(AvrInlineAsmReg)) {
cb(self);
macro_rules! reg_conflicts {
(
$(
$pair:ident : $hi:ident $lo:ident,
)*
) => {
match self {
$(
Self::$pair => {
cb(Self::$hi);
cb(Self::$lo);
}
Self::$hi => {
cb(Self::$pair);
}
Self::$lo => {
cb(Self::$pair);
}
)*
}
};
}
reg_conflicts! {
Z : r31 r30,
X : r27 r26,
r25r24 : r25 r24,
r23r22 : r23 r22,
r21r20 : r21 r20,
r19r18 : r19 r18,
r17r16 : r17 r16,
r15r14 : r15 r14,
r13r12 : r13 r12,
r11r10 : r11 r10,
r9r8 : r9 r8,
r7r6 : r7 r6,
r5r4 : r5 r4,
r3r2 : r3 r2,
}
}
}

25
compiler/rustc_target/src/asm/mod.rs
View file

@ -148,6 +148,7 @@ macro_rules! types {
mod aarch64;
mod arm;
mod avr;
mod bpf;
mod hexagon;
mod mips;
@ -161,6 +162,7 @@ mod x86;
pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
@ -191,6 +193,7 @@ pub enum InlineAsmArch {
Wasm32,
Wasm64,
Bpf,
Avr,
}
impl FromStr for InlineAsmArch {
@ -215,6 +218,7 @@ impl FromStr for InlineAsmArch {
"wasm32" => Ok(Self::Wasm32),
"wasm64" => Ok(Self::Wasm64),
"bpf" => Ok(Self::Bpf),
"avr" => Ok(Self::Avr),
_ => Err(()),
}
}
@ -245,6 +249,7 @@ pub enum InlineAsmReg {
SpirV(SpirVInlineAsmReg),
Wasm(WasmInlineAsmReg),
Bpf(BpfInlineAsmReg),
Avr(AvrInlineAsmReg),
// Placeholder for invalid register constraints for the current target
Err,
}
@ -261,6 +266,7 @@ impl InlineAsmReg {
Self::Mips(r) => r.name(),
Self::S390x(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Err => "<reg>",
}
}
@ -276,6 +282,7 @@ impl InlineAsmReg {
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
Self::Err => InlineAsmRegClass::Err,
}
}
@ -326,6 +333,9 @@ impl InlineAsmReg {
InlineAsmArch::Bpf => {
Self::Bpf(BpfInlineAsmReg::parse(arch, has_feature, target, &name)?)
}
InlineAsmArch::Avr => {
Self::Avr(AvrInlineAsmReg::parse(arch, has_feature, target, &name)?)
}
})
}
@ -347,6 +357,7 @@ impl InlineAsmReg {
Self::Mips(r) => r.emit(out, arch, modifier),
Self::S390x(r) => r.emit(out, arch, modifier),
Self::Bpf(r) => r.emit(out, arch, modifier),
Self::Avr(r) => r.emit(out, arch, modifier),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@ -362,6 +373,7 @@ impl InlineAsmReg {
Self::Mips(_) => cb(self),
Self::S390x(_) => cb(self),
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@ -392,6 +404,7 @@ pub enum InlineAsmRegClass {
SpirV(SpirVInlineAsmRegClass),
Wasm(WasmInlineAsmRegClass),
Bpf(BpfInlineAsmRegClass),
Avr(AvrInlineAsmRegClass),
// Placeholder for invalid register constraints for the current target
Err,
}
@ -411,6 +424,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.name(),
Self::Wasm(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Err => rustc_span::symbol::sym::reg,
}
}
@ -432,6 +446,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@ -460,6 +475,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.suggest_modifier(arch, ty),
Self::Wasm(r) => r.suggest_modifier(arch, ty),
Self::Bpf(r) => r.suggest_modifier(arch, ty),
Self::Avr(r) => r.suggest_modifier(arch, ty),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@ -484,6 +500,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.default_modifier(arch),
Self::Wasm(r) => r.default_modifier(arch),
Self::Bpf(r) => r.default_modifier(arch),
Self::Avr(r) => r.default_modifier(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@ -507,6 +524,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.supported_types(arch),
Self::Wasm(r) => r.supported_types(arch),
Self::Bpf(r) => r.supported_types(arch),
Self::Avr(r) => r.supported_types(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@ -535,6 +553,7 @@ impl InlineAsmRegClass {
Self::Wasm(WasmInlineAsmRegClass::parse(arch, name)?)
}
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?),
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(arch, name)?),
})
}
@ -554,6 +573,7 @@ impl InlineAsmRegClass {
Self::SpirV(r) => r.valid_modifiers(arch),
Self::Wasm(r) => r.valid_modifiers(arch),
Self::Bpf(r) => r.valid_modifiers(arch),
Self::Avr(r) => r.valid_modifiers(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@ -739,6 +759,11 @@ pub fn allocatable_registers(
bpf::fill_reg_map(arch, has_feature, target, &mut map);
map
}
InlineAsmArch::Avr => {
let mut map = avr::regclass_map();
avr::fill_reg_map(arch, has_feature, target, &mut map);
map
}
}
}