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Pass target_features set instead of has_feature closure

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This avoids unnecessary monomorphizations in codegen backends
This commit is contained in:
bjorn3 2022-01-10 15:48:05 +01:00
parent 991cbd1503
commit 042aa379a5
8 changed files with 63 additions and 62 deletions
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4
compiler/rustc_ast_lowering/src/asm.rs
View file

@ -66,7 +66,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
for (abi_name, abi_span) in &asm.clobber_abis { for (abi_name, abi_span) in &asm.clobber_abis {
match asm::InlineAsmClobberAbi::parse( match asm::InlineAsmClobberAbi::parse(
asm_arch, asm_arch,
|feature| self.sess.target_features.contains(&feature), &self.sess.target_features,
&self.sess.target, &self.sess.target,
*abi_name, *abi_name,
) { ) {
@ -134,7 +134,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch { asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
asm::InlineAsmReg::parse( asm::InlineAsmReg::parse(
asm_arch, asm_arch,
|feature| sess.target_features.contains(&feature), &sess.target_features,
&sess.target, &sess.target,
s, s,
) )

8
compiler/rustc_codegen_cranelift/src/inline_asm.rs
View file

@ -182,11 +182,7 @@ struct InlineAssemblyGenerator<'a, 'tcx> {
impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> { impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
fn allocate_registers(&mut self) { fn allocate_registers(&mut self) {
let sess = self.tcx.sess; let sess = self.tcx.sess;
let map = allocatable_registers( let map = allocatable_registers(self.arch, &sess.target_features, &sess.target);
self.arch,
|feature| sess.target_features.contains(&feature),
&sess.target,
);
let mut allocated = FxHashMap::<_, (bool, bool)>::default(); let mut allocated = FxHashMap::<_, (bool, bool)>::default();
let mut regs = vec![None; self.operands.len()]; let mut regs = vec![None; self.operands.len()];
@ -319,7 +315,7 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
// Allocate stack slots for saving clobbered registers // Allocate stack slots for saving clobbered registers
let abi_clobber = InlineAsmClobberAbi::parse( let abi_clobber = InlineAsmClobberAbi::parse(
self.arch, self.arch,
|feature| self.tcx.sess.target_features.contains(&feature), &self.tcx.sess.target_features,
&self.tcx.sess.target, &self.tcx.sess.target,
sym::C, sym::C,
) )

3
compiler/rustc_target/src/asm/aarch64.rs
View file

@ -1,5 +1,6 @@
use super::{InlineAsmArch, InlineAsmType}; use super::{InlineAsmArch, InlineAsmType};
use crate::spec::Target; use crate::spec::Target;
use rustc_data_structures::stable_set::FxHashSet;
use rustc_macros::HashStable_Generic; use rustc_macros::HashStable_Generic;
use rustc_span::Symbol; use rustc_span::Symbol;
use std::fmt; use std::fmt;
@ -74,7 +75,7 @@ impl AArch64InlineAsmRegClass {
pub fn reserved_x18( pub fn reserved_x18(
_arch: InlineAsmArch, _arch: InlineAsmArch,
_has_feature: impl FnMut(Symbol) -> bool, _target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if target.os == "android" if target.os == "android"

23
compiler/rustc_target/src/asm/arm.rs
View file

@ -1,5 +1,6 @@
use super::{InlineAsmArch, InlineAsmType}; use super::{InlineAsmArch, InlineAsmType};
use crate::spec::Target; use crate::spec::Target;
use rustc_data_structures::stable_set::FxHashSet;
use rustc_macros::HashStable_Generic; use rustc_macros::HashStable_Generic;
use rustc_span::{sym, Symbol}; use rustc_span::{sym, Symbol};
use std::fmt; use std::fmt;
@ -60,16 +61,16 @@ impl ArmInlineAsmRegClass {
} }
// This uses the same logic as useR7AsFramePointer in LLVM // This uses the same logic as useR7AsFramePointer in LLVM
fn frame_pointer_is_r7(mut has_feature: impl FnMut(Symbol) -> bool, target: &Target) -> bool { fn frame_pointer_is_r7(target_features: &FxHashSet<Symbol>, target: &Target) -> bool {
target.is_like_osx || (!target.is_like_windows && has_feature(sym::thumb_mode)) target.is_like_osx || (!target.is_like_windows && target_features.contains(&sym::thumb_mode))
} }
fn frame_pointer_r11( fn frame_pointer_r11(
_arch: InlineAsmArch, _arch: InlineAsmArch,
has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if !frame_pointer_is_r7(has_feature, target) { if !frame_pointer_is_r7(target_features, target) {
Err("the frame pointer (r11) cannot be used as an operand for inline asm") Err("the frame pointer (r11) cannot be used as an operand for inline asm")
} else { } else {
Ok(()) Ok(())
@ -78,10 +79,10 @@ fn frame_pointer_r11(
fn frame_pointer_r7( fn frame_pointer_r7(
_arch: InlineAsmArch, _arch: InlineAsmArch,
has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if frame_pointer_is_r7(has_feature, target) { if frame_pointer_is_r7(target_features, target) {
Err("the frame pointer (r7) cannot be used as an operand for inline asm") Err("the frame pointer (r7) cannot be used as an operand for inline asm")
} else { } else {
Ok(()) Ok(())
@ -90,10 +91,10 @@ fn frame_pointer_r7(
fn not_thumb1( fn not_thumb1(
_arch: InlineAsmArch, _arch: InlineAsmArch,
mut has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if has_feature(sym::thumb_mode) && !has_feature(sym::thumb2) { if target_features.contains(&sym::thumb_mode) && !target_features.contains(&sym::thumb2) {
Err("high registers (r8+) cannot be used in Thumb-1 code") Err("high registers (r8+) cannot be used in Thumb-1 code")
} else { } else {
Ok(()) Ok(())
@ -102,14 +103,14 @@ fn not_thumb1(
fn reserved_r9( fn reserved_r9(
arch: InlineAsmArch, arch: InlineAsmArch,
mut has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
not_thumb1(arch, &mut has_feature, target)?; not_thumb1(arch, target_features, target)?;
// We detect this using the reserved-r9 feature instead of using the target // We detect this using the reserved-r9 feature instead of using the target
// because the relocation model can be changed with compiler options. // because the relocation model can be changed with compiler options.
if has_feature(sym::reserved_r9) { if target_features.contains(&sym::reserved_r9) {
Err("the RWPI static base register (r9) cannot be used as an operand for inline asm") Err("the RWPI static base register (r9) cannot be used as an operand for inline asm")
} else { } else {
Ok(()) Ok(())

5
compiler/rustc_target/src/asm/bpf.rs
View file

@ -1,4 +1,5 @@
use super::{InlineAsmArch, InlineAsmType, Target}; use super::{InlineAsmArch, InlineAsmType, Target};
use rustc_data_structures::stable_set::FxHashSet;
use rustc_macros::HashStable_Generic; use rustc_macros::HashStable_Generic;
use rustc_span::{sym, Symbol}; use rustc_span::{sym, Symbol};
use std::fmt; use std::fmt;
@ -44,10 +45,10 @@ impl BpfInlineAsmRegClass {
fn only_alu32( fn only_alu32(
_arch: InlineAsmArch, _arch: InlineAsmArch,
mut has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if !has_feature(sym::alu32) { if !target_features.contains(&sym::alu32) {
Err("register can't be used without the `alu32` target feature") Err("register can't be used without the `alu32` target feature")
} else { } else {
Ok(()) Ok(())

68
compiler/rustc_target/src/asm/mod.rs
View file

@ -81,14 +81,14 @@ macro_rules! def_regs {
pub fn parse( pub fn parse(
_arch: super::InlineAsmArch, _arch: super::InlineAsmArch,
mut _has_feature: impl FnMut(rustc_span::Symbol) -> bool, _target_features: &rustc_data_structures::fx::FxHashSet<Symbol>,
_target: &crate::spec::Target, _target: &crate::spec::Target,
name: &str, name: &str,
) -> Result<Self, &'static str> { ) -> Result<Self, &'static str> {
match name { match name {
$( $(
$($alias)|* | $reg_name => { $($alias)|* | $reg_name => {
$($filter(_arch, &mut _has_feature, _target)?;)? $($filter(_arch, _target_features, _target)?;)?
Ok(Self::$reg) Ok(Self::$reg)
} }
)* )*
@ -102,7 +102,7 @@ macro_rules! def_regs {
pub(super) fn fill_reg_map( pub(super) fn fill_reg_map(
_arch: super::InlineAsmArch, _arch: super::InlineAsmArch,
mut _has_feature: impl FnMut(rustc_span::Symbol) -> bool, _target_features: &rustc_data_structures::fx::FxHashSet<Symbol>,
_target: &crate::spec::Target, _target: &crate::spec::Target,
_map: &mut rustc_data_structures::fx::FxHashMap< _map: &mut rustc_data_structures::fx::FxHashMap<
super::InlineAsmRegClass, super::InlineAsmRegClass,
@ -112,7 +112,7 @@ macro_rules! def_regs {
#[allow(unused_imports)] #[allow(unused_imports)]
use super::{InlineAsmReg, InlineAsmRegClass}; use super::{InlineAsmReg, InlineAsmRegClass};
$( $(
if $($filter(_arch, &mut _has_feature, _target).is_ok() &&)? true { if $($filter(_arch, _target_features, _target).is_ok() &&)? true {
if let Some(set) = _map.get_mut(&InlineAsmRegClass::$arch($arch_regclass::$class)) { if let Some(set) = _map.get_mut(&InlineAsmRegClass::$arch($arch_regclass::$class)) {
set.insert(InlineAsmReg::$arch($arch_reg::$reg)); set.insert(InlineAsmReg::$arch($arch_reg::$reg));
} }
@ -289,7 +289,7 @@ impl InlineAsmReg {
pub fn parse( pub fn parse(
arch: InlineAsmArch, arch: InlineAsmArch,
has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
name: Symbol, name: Symbol,
) -> Result<Self, &'static str> { ) -> Result<Self, &'static str> {
@ -298,43 +298,43 @@ impl InlineAsmReg {
let name = name.as_str(); let name = name.as_str();
Ok(match arch { Ok(match arch {
InlineAsmArch::X86 | InlineAsmArch::X86_64 => { InlineAsmArch::X86 | InlineAsmArch::X86_64 => {
Self::X86(X86InlineAsmReg::parse(arch, has_feature, target, name)?) Self::X86(X86InlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Arm => { InlineAsmArch::Arm => {
Self::Arm(ArmInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Arm(ArmInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::AArch64 => { InlineAsmArch::AArch64 => {
Self::AArch64(AArch64InlineAsmReg::parse(arch, has_feature, target, name)?) Self::AArch64(AArch64InlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => { InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {
Self::RiscV(RiscVInlineAsmReg::parse(arch, has_feature, target, name)?) Self::RiscV(RiscVInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Nvptx64 => { InlineAsmArch::Nvptx64 => {
Self::Nvptx(NvptxInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Nvptx(NvptxInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
Self::PowerPC(PowerPCInlineAsmReg::parse(arch, has_feature, target, name)?) Self::PowerPC(PowerPCInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Hexagon => { InlineAsmArch::Hexagon => {
Self::Hexagon(HexagonInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Hexagon(HexagonInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Mips | InlineAsmArch::Mips64 => { InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
Self::Mips(MipsInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Mips(MipsInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::S390x => { InlineAsmArch::S390x => {
Self::S390x(S390xInlineAsmReg::parse(arch, has_feature, target, name)?) Self::S390x(S390xInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::SpirV => { InlineAsmArch::SpirV => {
Self::SpirV(SpirVInlineAsmReg::parse(arch, has_feature, target, name)?) Self::SpirV(SpirVInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => { InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {
Self::Wasm(WasmInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Wasm(WasmInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Bpf => { InlineAsmArch::Bpf => {
Self::Bpf(BpfInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Bpf(BpfInlineAsmReg::parse(arch, target_features, target, name)?)
} }
InlineAsmArch::Avr => { InlineAsmArch::Avr => {
Self::Avr(AvrInlineAsmReg::parse(arch, has_feature, target, name)?) Self::Avr(AvrInlineAsmReg::parse(arch, target_features, target, name)?)
} }
}) })
} }
@ -695,73 +695,73 @@ impl fmt::Display for InlineAsmType {
// falling back to an external assembler. // falling back to an external assembler.
pub fn allocatable_registers( pub fn allocatable_registers(
arch: InlineAsmArch, arch: InlineAsmArch,
has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &crate::spec::Target, target: &crate::spec::Target,
) -> FxHashMap<InlineAsmRegClass, FxHashSet<InlineAsmReg>> { ) -> FxHashMap<InlineAsmRegClass, FxHashSet<InlineAsmReg>> {
match arch { match arch {
InlineAsmArch::X86 | InlineAsmArch::X86_64 => { InlineAsmArch::X86 | InlineAsmArch::X86_64 => {
let mut map = x86::regclass_map(); let mut map = x86::regclass_map();
x86::fill_reg_map(arch, has_feature, target, &mut map); x86::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Arm => { InlineAsmArch::Arm => {
let mut map = arm::regclass_map(); let mut map = arm::regclass_map();
arm::fill_reg_map(arch, has_feature, target, &mut map); arm::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::AArch64 => { InlineAsmArch::AArch64 => {
let mut map = aarch64::regclass_map(); let mut map = aarch64::regclass_map();
aarch64::fill_reg_map(arch, has_feature, target, &mut map); aarch64::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => { InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {
let mut map = riscv::regclass_map(); let mut map = riscv::regclass_map();
riscv::fill_reg_map(arch, has_feature, target, &mut map); riscv::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Nvptx64 => { InlineAsmArch::Nvptx64 => {
let mut map = nvptx::regclass_map(); let mut map = nvptx::regclass_map();
nvptx::fill_reg_map(arch, has_feature, target, &mut map); nvptx::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
let mut map = powerpc::regclass_map(); let mut map = powerpc::regclass_map();
powerpc::fill_reg_map(arch, has_feature, target, &mut map); powerpc::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Hexagon => { InlineAsmArch::Hexagon => {
let mut map = hexagon::regclass_map(); let mut map = hexagon::regclass_map();
hexagon::fill_reg_map(arch, has_feature, target, &mut map); hexagon::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Mips | InlineAsmArch::Mips64 => { InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
let mut map = mips::regclass_map(); let mut map = mips::regclass_map();
mips::fill_reg_map(arch, has_feature, target, &mut map); mips::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::S390x => { InlineAsmArch::S390x => {
let mut map = s390x::regclass_map(); let mut map = s390x::regclass_map();
s390x::fill_reg_map(arch, has_feature, target, &mut map); s390x::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::SpirV => { InlineAsmArch::SpirV => {
let mut map = spirv::regclass_map(); let mut map = spirv::regclass_map();
spirv::fill_reg_map(arch, has_feature, target, &mut map); spirv::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => { InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {
let mut map = wasm::regclass_map(); let mut map = wasm::regclass_map();
wasm::fill_reg_map(arch, has_feature, target, &mut map); wasm::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Bpf => { InlineAsmArch::Bpf => {
let mut map = bpf::regclass_map(); let mut map = bpf::regclass_map();
bpf::fill_reg_map(arch, has_feature, target, &mut map); bpf::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
InlineAsmArch::Avr => { InlineAsmArch::Avr => {
let mut map = avr::regclass_map(); let mut map = avr::regclass_map();
avr::fill_reg_map(arch, has_feature, target, &mut map); avr::fill_reg_map(arch, target_features, target, &mut map);
map map
} }
} }
@ -794,7 +794,7 @@ impl InlineAsmClobberAbi {
/// clobber ABIs for the target. /// clobber ABIs for the target.
pub fn parse( pub fn parse(
arch: InlineAsmArch, arch: InlineAsmArch,
has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
target: &Target, target: &Target,
name: Symbol, name: Symbol,
) -> Result<Self, &'static [&'static str]> { ) -> Result<Self, &'static [&'static str]> {
@ -819,7 +819,7 @@ impl InlineAsmClobberAbi {
}, },
InlineAsmArch::AArch64 => match name { InlineAsmArch::AArch64 => match name {
"C" | "system" | "efiapi" => { "C" | "system" | "efiapi" => {
Ok(if aarch64::reserved_x18(arch, has_feature, target).is_err() { Ok(if aarch64::reserved_x18(arch, target_features, target).is_err() {
InlineAsmClobberAbi::AArch64NoX18 InlineAsmClobberAbi::AArch64NoX18
} else { } else {
InlineAsmClobberAbi::AArch64 InlineAsmClobberAbi::AArch64

5
compiler/rustc_target/src/asm/riscv.rs
View file

@ -1,5 +1,6 @@
use super::{InlineAsmArch, InlineAsmType}; use super::{InlineAsmArch, InlineAsmType};
use crate::spec::Target; use crate::spec::Target;
use rustc_data_structures::stable_set::FxHashSet;
use rustc_macros::HashStable_Generic; use rustc_macros::HashStable_Generic;
use rustc_span::{sym, Symbol}; use rustc_span::{sym, Symbol};
use std::fmt; use std::fmt;
@ -53,10 +54,10 @@ impl RiscVInlineAsmRegClass {
fn not_e( fn not_e(
_arch: InlineAsmArch, _arch: InlineAsmArch,
mut has_feature: impl FnMut(Symbol) -> bool, target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
if has_feature(sym::e) { if target_features.contains(&sym::e) {
Err("register can't be used with the `e` target feature") Err("register can't be used with the `e` target feature")
} else { } else {
Ok(()) Ok(())

9
compiler/rustc_target/src/asm/x86.rs
View file

@ -1,5 +1,6 @@
use super::{InlineAsmArch, InlineAsmType}; use super::{InlineAsmArch, InlineAsmType};
use crate::spec::Target; use crate::spec::Target;
use rustc_data_structures::stable_set::FxHashSet;
use rustc_macros::HashStable_Generic; use rustc_macros::HashStable_Generic;
use rustc_span::Symbol; use rustc_span::Symbol;
use std::fmt; use std::fmt;
@ -138,7 +139,7 @@ impl X86InlineAsmRegClass {
fn x86_64_only( fn x86_64_only(
arch: InlineAsmArch, arch: InlineAsmArch,
_has_feature: impl FnMut(Symbol) -> bool, _target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
match arch { match arch {
@ -150,7 +151,7 @@ fn x86_64_only(
fn high_byte( fn high_byte(
arch: InlineAsmArch, arch: InlineAsmArch,
_has_feature: impl FnMut(Symbol) -> bool, _target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
match arch { match arch {
@ -161,7 +162,7 @@ fn high_byte(
fn rbx_reserved( fn rbx_reserved(
arch: InlineAsmArch, arch: InlineAsmArch,
_has_feature: impl FnMut(Symbol) -> bool, _target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
match arch { match arch {
@ -175,7 +176,7 @@ fn rbx_reserved(
fn esi_reserved( fn esi_reserved(
arch: InlineAsmArch, arch: InlineAsmArch,
_has_feature: impl FnMut(Symbol) -> bool, _target_features: &FxHashSet<Symbol>,
_target: &Target, _target: &Target,
) -> Result<(), &'static str> { ) -> Result<(), &'static str> {
match arch { match arch {