rust/tests/ui/asm/riscv/riscv32e-registers.riscv32em_llvm_18.stderr

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:54:11
   |
LL |     asm!("li x16, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x16, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:57:11
   |
LL |     asm!("li x17, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x17, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:60:11
   |
LL |     asm!("li x18, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x18, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:63:11
   |
LL |     asm!("li x19, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x19, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:66:11
   |
LL |     asm!("li x20, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x20, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:69:11
   |
LL |     asm!("li x21, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x21, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:72:11
   |
LL |     asm!("li x22, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x22, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:75:11
   |
LL |     asm!("li x23, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x23, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:78:11
   |
LL |     asm!("li x24, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x24, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:81:11
   |
LL |     asm!("li x25, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x25, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:84:11
   |
LL |     asm!("li x26, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x26, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:87:11
   |
LL |     asm!("li x27, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x27, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:90:11
   |
LL |     asm!("li x28, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x28, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:93:11
   |
LL |     asm!("li x29, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x29, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:96:11
   |
LL |     asm!("li x30, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x30, 0
   |        ^

error: invalid operand for instruction
  --> $DIR/riscv32e-registers.rs:99:11
   |
LL |     asm!("li x31, 0");
   |           ^
   |
note: instantiated into assembly here
  --> <inline asm>:1:5
   |
LL |     li x31, 0
   |        ^

error: aborting due to 16 previous errors