diff --git a/tests/codegen/swap-small-types.rs b/tests/codegen/swap-small-types.rs
index 03e2a2327fc..6289d7af3a0 100644
--- a/tests/codegen/swap-small-types.rs
+++ b/tests/codegen/swap-small-types.rs
@@ -8,10 +8,30 @@ use std::mem::swap;
 
 type RGB48 = [u16; 3];
 
+// CHECK-LABEL: @swap_rgb48_manually(
+#[no_mangle]
+pub fn swap_rgb48_manually(x: &mut RGB48, y: &mut RGB48) {
+    // CHECK-NOT: alloca
+    // CHECK: %temp = alloca [3 x i16]
+    // CHECK-NOT: alloca
+    // CHECK-NOT: call void @llvm.memcpy
+    // CHECK: call void @llvm.memcpy.{{.+}}({{.+}} %temp, {{.+}} %x, {{.+}} 6, {{.+}})
+    // CHECK: call void @llvm.memcpy.{{.+}}({{.+}} %x, {{.+}} %y, {{.+}} 6, {{.+}})
+    // CHECK: call void @llvm.memcpy.{{.+}}({{.+}} %y, {{.+}} %temp, {{.+}} 6, {{.+}})
+    // CHECK-NOT: call void @llvm.memcpy
+
+    let temp = *x;
+    *x = *y;
+    *y = temp;
+}
+
 // CHECK-LABEL: @swap_rgb48
 #[no_mangle]
 pub fn swap_rgb48(x: &mut RGB48, y: &mut RGB48) {
     // FIXME MIR inlining messes up LLVM optimizations.
+    // If these checks start failing, please update this test.
+    // CHECK: alloca [3 x i16]
+    // CHECK: call void @llvm.memcpy
 // WOULD-CHECK-NOT: alloca
 // WOULD-CHECK: load i48
 // WOULD-CHECK: store i48