From bb6be30d6f7bf502e5e6fa28f460902ea03cd75b Mon Sep 17 00:00:00 2001 From: Huon Wilson Date: Mon, 31 Aug 2015 15:06:00 -0700 Subject: [PATCH] Remove some SIMD codepaths from trans. --- src/librustc_trans/trans/consts.rs | 20 ++++--------------- src/librustc_trans/trans/expr.rs | 32 +++++------------------------- 2 files changed, 9 insertions(+), 43 deletions(-) diff --git a/src/librustc_trans/trans/consts.rs b/src/librustc_trans/trans/consts.rs index 5b6da5dadd5..87a73c4d0a2 100644 --- a/src/librustc_trans/trans/consts.rs +++ b/src/librustc_trans/trans/consts.rs @@ -501,14 +501,9 @@ fn const_expr_unadjusted<'a, 'tcx>(cx: &CrateContext<'a, 'tcx>, debug!("const_expr_unadjusted: te1={}, ty={:?}", cx.tn().val_to_string(te1), ty); - let is_simd = ty.is_simd(); - let intype = if is_simd { - ty.simd_type(cx.tcx()) - } else { - ty - }; - let is_float = intype.is_fp(); - let signed = intype.is_signed(); + assert!(!ty.is_simd()); + let is_float = ty.is_fp(); + let signed = ty.is_signed(); let (te2, _) = const_expr(cx, &**e2, param_substs, fn_args); @@ -552,14 +547,7 @@ fn const_expr_unadjusted<'a, 'tcx>(cx: &CrateContext<'a, 'tcx>, ConstFCmp(cmp, te1, te2) } else { let cmp = base::bin_op_to_icmp_predicate(cx, b.node, signed); - let bool_val = ConstICmp(cmp, te1, te2); - if is_simd { - // LLVM outputs an `< size x i1 >`, so we need to perform - // a sign extension to get the correctly sized type. - llvm::LLVMConstIntCast(bool_val, val_ty(te1).to_ref(), True) - } else { - bool_val - } + ConstICmp(cmp, te1, te2) } }, } } // unsafe { match b.node { diff --git a/src/librustc_trans/trans/expr.rs b/src/librustc_trans/trans/expr.rs index 20d189a5cd7..b4472881389 100644 --- a/src/librustc_trans/trans/expr.rs +++ b/src/librustc_trans/trans/expr.rs @@ -1693,14 +1693,9 @@ fn trans_eager_binop<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, let _icx = push_ctxt("trans_eager_binop"); let tcx = bcx.tcx(); - let is_simd = lhs_t.is_simd(); - let intype = if is_simd { - lhs_t.simd_type(tcx) - } else { - lhs_t - }; - let is_float = intype.is_fp(); - let is_signed = intype.is_signed(); + assert!(!lhs_t.is_simd()); + let is_float = lhs_t.is_fp(); + let is_signed = lhs_t.is_signed(); let info = expr_info(binop_expr); let binop_debug_loc = binop_expr.debug_loc(); @@ -1710,8 +1705,6 @@ fn trans_eager_binop<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, ast::BiAdd => { if is_float { FAdd(bcx, lhs, rhs, binop_debug_loc) - } else if is_simd { - Add(bcx, lhs, rhs, binop_debug_loc) } else { let (newbcx, res) = with_overflow_check( bcx, OverflowOp::Add, info, lhs_t, lhs, rhs, binop_debug_loc); @@ -1722,8 +1715,6 @@ fn trans_eager_binop<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, ast::BiSub => { if is_float { FSub(bcx, lhs, rhs, binop_debug_loc) - } else if is_simd { - Sub(bcx, lhs, rhs, binop_debug_loc) } else { let (newbcx, res) = with_overflow_check( bcx, OverflowOp::Sub, info, lhs_t, lhs, rhs, binop_debug_loc); @@ -1734,8 +1725,6 @@ fn trans_eager_binop<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, ast::BiMul => { if is_float { FMul(bcx, lhs, rhs, binop_debug_loc) - } else if is_simd { - Mul(bcx, lhs, rhs, binop_debug_loc) } else { let (newbcx, res) = with_overflow_check( bcx, OverflowOp::Mul, info, lhs_t, lhs, rhs, binop_debug_loc); @@ -1828,11 +1817,7 @@ fn trans_eager_binop<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, res } ast::BiEq | ast::BiNe | ast::BiLt | ast::BiGe | ast::BiLe | ast::BiGt => { - if is_simd { - base::compare_simd_types(bcx, lhs, rhs, intype, val_ty(lhs), op.node, binop_debug_loc) - } else { - base::compare_scalar_types(bcx, lhs, rhs, intype, op.node, binop_debug_loc) - } + base::compare_scalar_types(bcx, lhs, rhs, lhs_t, op.node, binop_debug_loc) } _ => { bcx.tcx().sess.span_bug(binop_expr.span, "unexpected binop"); @@ -2533,14 +2518,7 @@ fn build_unchecked_rshift<'blk, 'tcx>(bcx: Block<'blk, 'tcx>, let rhs = base::cast_shift_expr_rhs(bcx, ast::BinOp_::BiShr, lhs, rhs); // #1877, #10183: Ensure that input is always valid let rhs = shift_mask_rhs(bcx, rhs, binop_debug_loc); - let tcx = bcx.tcx(); - let is_simd = lhs_t.is_simd(); - let intype = if is_simd { - lhs_t.simd_type(tcx) - } else { - lhs_t - }; - let is_signed = intype.is_signed(); + let is_signed = lhs_t.is_signed(); if is_signed { AShr(bcx, lhs, rhs, binop_debug_loc) } else {