diff --git a/Makefile.in b/Makefile.in
index 30aefd02cd2..8d6e9b6c285 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -244,7 +244,7 @@ DRIVER_CRATE := $(S)src/driver/driver.rs
 ######################################################################
 
 # FIXME: x86-ism
-LLVM_COMPONENTS=x86 arm ipo bitreader bitwriter linker asmparser jit mcjit \
+LLVM_COMPONENTS=x86 arm mips ipo bitreader bitwriter linker asmparser jit mcjit \
                 interpreter
 
 define DEF_LLVM_VARS
diff --git a/src/libcore/cleanup.rs b/src/libcore/cleanup.rs
index 393a71562ad..4d599640f36 100644
--- a/src/libcore/cleanup.rs
+++ b/src/libcore/cleanup.rs
@@ -41,8 +41,14 @@ struct Registers {
     data: [u32 * 16]
 }
 
+#[cfg(target_arch="mips")]
+struct Registers {
+    data: [u32 * 32]
+}
+
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 struct Context {
     regs: Registers,
     next: *Context,
@@ -69,6 +75,7 @@ struct BoxedRegion {
 
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 struct Task {
     // Public fields
     refcount: intptr_t,                 // 0
diff --git a/src/libcore/libc.rs b/src/libcore/libc.rs
index 6976c83a6f4..c6229d7604c 100644
--- a/src/libcore/libc.rs
+++ b/src/libcore/libc.rs
@@ -203,6 +203,7 @@ pub mod types {
 
         #[cfg(target_arch = "x86")]
         #[cfg(target_arch = "arm")]
+        #[cfg(target_arch = "mips")]
         pub mod arch {
             pub mod c95 {
                 pub type c_char = i8;
diff --git a/src/libcore/num/uint-template/uint.rs b/src/libcore/num/uint-template/uint.rs
index e2a75b25eae..07467575319 100644
--- a/src/libcore/num/uint-template/uint.rs
+++ b/src/libcore/num/uint-template/uint.rs
@@ -28,6 +28,7 @@ pub mod inst {
 
     #[cfg(target_arch = "x86")]
     #[cfg(target_arch = "arm")]
+    #[cfg(target_arch = "mips")]
     pub const bits: uint = 32;
 
     #[cfg(target_arch = "x86_64")]
diff --git a/src/libcore/os.rs b/src/libcore/os.rs
index cf74ec6d77a..6e040286ba4 100644
--- a/src/libcore/os.rs
+++ b/src/libcore/os.rs
@@ -1097,6 +1097,9 @@ pub mod consts {
     #[cfg(target_arch = "arm")]
     pub use os::consts::arm::*;
 
+    #[cfg(target_arch = "mips")]
+    use os::consts::mips::*;
+
     pub mod x86 {
         pub const ARCH: &str = "x86";
     }
@@ -1106,6 +1109,9 @@ pub mod consts {
     pub mod arm {
         pub const ARCH: &str = "arm";
     }
+    pub mod mips {
+        pub const ARCH: &str = "mips";
+    }
 }
 
 #[cfg(test)]
diff --git a/src/libcore/path.rs b/src/libcore/path.rs
index 4e0e4e93cf5..8d528a11598 100644
--- a/src/libcore/path.rs
+++ b/src/libcore/path.rs
@@ -91,6 +91,7 @@ pub pure fn Path(s: &str) -> Path {
 mod stat {
     #[cfg(target_arch = "x86")]
     #[cfg(target_arch = "arm")]
+    #[cfg(target_arch = "mips")]
     pub mod arch {
         use libc;
 
diff --git a/src/libcore/sys.rs b/src/libcore/sys.rs
index afc9d7f1417..ec3ab25a27d 100644
--- a/src/libcore/sys.rs
+++ b/src/libcore/sys.rs
@@ -166,6 +166,7 @@ pub mod tests {
     #[test]
     #[cfg(target_arch = "x86")]
     #[cfg(target_arch = "arm")]
+    #[cfg(target_arch = "mips")]
     pub fn size_of_32() {
         assert size_of::<uint>() == 4u;
         assert size_of::<*uint>() == 4u;
@@ -196,6 +197,7 @@ pub mod tests {
     #[test]
     #[cfg(target_arch = "x86")]
     #[cfg(target_arch = "arm")]
+    #[cfg(target_arch = "mips")]
     pub fn align_of_32() {
         assert pref_align_of::<uint>() == 4u;
         assert pref_align_of::<*uint>() == 4u;
diff --git a/src/librustc/back/mips.rs b/src/librustc/back/mips.rs
new file mode 100644
index 00000000000..32d434ed49d
--- /dev/null
+++ b/src/librustc/back/mips.rs
@@ -0,0 +1,85 @@
+// Copyright 2012 The Rust Project Developers. See the COPYRIGHT
+// file at the top-level directory of this distribution and at
+// http://rust-lang.org/COPYRIGHT.
+//
+// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+// option. This file may not be copied, modified, or distributed
+// except according to those terms.
+
+use back::target_strs;
+use driver::session;
+use session::sess_os_to_meta_os;
+use metadata::loader::meta_section_name;
+
+pub fn get_target_strs(target_os: session::os) -> target_strs::t {
+    return target_strs::t {
+        module_asm: ~"",
+
+        meta_sect_name: meta_section_name(sess_os_to_meta_os(target_os)),
+
+        data_layout: match target_os {
+          session::os_macos => {
+            ~"e-p:32:32:32" +
+                ~"-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" +
+                ~"-f32:32:32-f64:64:64" +
+                ~"-v64:64:64-v128:64:128" +
+                ~"-a0:0:64-n32"
+          }
+
+          session::os_win32 => {
+            ~"e-p:32:32:32" +
+                ~"-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" +
+                ~"-f32:32:32-f64:64:64" +
+                ~"-v64:64:64-v128:64:128" +
+                ~"-a0:0:64-n32"
+          }
+
+          session::os_linux => {
+            ~"e-p:32:32:32" +
+                ~"-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" +
+                ~"-f32:32:32-f64:64:64" +
+                ~"-v64:64:64-v128:64:128" +
+                ~"-a0:0:64-n32"
+          }
+
+          session::os_android => {
+            ~"e-p:32:32:32" +
+                ~"-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" +
+                ~"-f32:32:32-f64:64:64" +
+                ~"-v64:64:64-v128:64:128" +
+                ~"-a0:0:64-n32"
+          }
+
+          session::os_freebsd => {
+            ~"e-p:32:32:32" +
+                ~"-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" +
+                ~"-f32:32:32-f64:64:64" +
+                ~"-v64:64:64-v128:64:128" +
+                ~"-a0:0:64-n32"
+          }
+        },
+
+        target_triple: match target_os {
+          session::os_macos => ~"mips-apple-darwin",
+          session::os_win32 => ~"mips-pc-mingw32",
+          session::os_linux => ~"mips-unknown-linux-gnu",
+          session::os_android => ~"mips-unknown-android-gnu",
+          session::os_freebsd => ~"mips-unknown-freebsd"
+        },
+
+        cc_args: ~[]
+    };
+}
+
+
+//
+// Local Variables:
+// mode: rust
+// fill-column: 78;
+// indent-tabs-mode: nil
+// c-basic-offset: 4
+// buffer-file-coding-system: utf-8-unix
+// End:
+//
diff --git a/src/librustc/driver/driver.rs b/src/librustc/driver/driver.rs
index 6e6213d4427..b24cdf9c602 100644
--- a/src/librustc/driver/driver.rs
+++ b/src/librustc/driver/driver.rs
@@ -11,7 +11,7 @@
 use core::prelude::*;
 
 use back::link;
-use back::{arm, x86, x86_64};
+use back::{arm, x86, x86_64, mips};
 use driver::session::{Aggressive};
 use driver::session::{Session, Session_, OptLevel, No, Less, Default};
 use driver::session;
@@ -94,7 +94,8 @@ pub fn default_configuration(sess: Session, +argv0: ~str, input: input) ->
     let (end,arch,wordsz) = match sess.targ_cfg.arch {
       session::arch_x86 => (~"little",~"x86",~"32"),
       session::arch_x86_64 => (~"little",~"x86_64",~"64"),
-      session::arch_arm => (~"little",~"arm",~"32")
+      session::arch_arm => (~"little",~"arm",~"32"),
+      session::arch_mips => (~"little",~"arm",~"32")
     };
 
     return ~[ // Target bindings.
@@ -472,6 +473,8 @@ pub fn get_arch(triple: ~str) -> Option<session::arch> {
         } else if str::contains(triple, ~"arm") ||
                       str::contains(triple, ~"xscale") {
             Some(session::arch_arm)
+        } else if str::contains(triple, ~"mips") {
+            Some(session::arch_mips)
         } else { None }
 }
 
@@ -490,12 +493,14 @@ pub fn build_target_config(sopts: @session::options,
     let (int_type, uint_type, float_type) = match arch {
       session::arch_x86 => (ast::ty_i32, ast::ty_u32, ast::ty_f64),
       session::arch_x86_64 => (ast::ty_i64, ast::ty_u64, ast::ty_f64),
-      session::arch_arm => (ast::ty_i32, ast::ty_u32, ast::ty_f64)
+      session::arch_arm => (ast::ty_i32, ast::ty_u32, ast::ty_f64),
+      session::arch_mips => (ast::ty_i32, ast::ty_u32, ast::ty_f64)
     };
     let target_strs = match arch {
       session::arch_x86 => x86::get_target_strs(os),
       session::arch_x86_64 => x86_64::get_target_strs(os),
-      session::arch_arm => arm::get_target_strs(os)
+      session::arch_arm => arm::get_target_strs(os),
+      session::arch_mips => mips::get_target_strs(os)
     };
     let target_cfg = @session::config {
         os: os,
diff --git a/src/librustc/driver/session.rs b/src/librustc/driver/session.rs
index 5da16dd5342..52ca0a886c9 100644
--- a/src/librustc/driver/session.rs
+++ b/src/librustc/driver/session.rs
@@ -33,7 +33,7 @@ use syntax;
 pub enum os { os_win32, os_macos, os_linux, os_android, os_freebsd, }
 
 #[deriving_eq]
-pub enum arch { arch_x86, arch_x86_64, arch_arm, }
+pub enum arch { arch_x86, arch_x86_64, arch_arm, arch_mips, }
 
 pub enum crate_type { bin_crate, lib_crate, unknown_crate, }
 
diff --git a/src/librustc/middle/trans/base.rs b/src/librustc/middle/trans/base.rs
index a714446235a..7998d4ebcac 100644
--- a/src/librustc/middle/trans/base.rs
+++ b/src/librustc/middle/trans/base.rs
@@ -1484,7 +1484,9 @@ pub fn call_memcpy(cx: block, dst: ValueRef, src: ValueRef,
     let _icx = cx.insn_ctxt("call_memcpy");
     let ccx = cx.ccx();
     let key = match ccx.sess.targ_cfg.arch {
-      session::arch_x86 | session::arch_arm => ~"llvm.memcpy.p0i8.p0i8.i32",
+      session::arch_x86
+      | session::arch_arm
+      | session::arch_mips => ~"llvm.memcpy.p0i8.p0i8.i32",
       session::arch_x86_64 => ~"llvm.memcpy.p0i8.p0i8.i64"
     };
     let memcpy = ccx.intrinsics.get(&key);
@@ -1526,7 +1528,9 @@ pub fn memzero(cx: block, llptr: ValueRef, llty: TypeRef) {
 
     let intrinsic_key;
     match ccx.sess.targ_cfg.arch {
-        session::arch_x86 | session::arch_arm => {
+        session::arch_x86
+        | session::arch_arm
+        | session::arch_mips => {
             intrinsic_key = ~"llvm.memset.p0i8.i32";
         }
         session::arch_x86_64 => {
diff --git a/src/librustc/middle/trans/common.rs b/src/librustc/middle/trans/common.rs
index bd8bbfce5a4..c7036324456 100644
--- a/src/librustc/middle/trans/common.rs
+++ b/src/librustc/middle/trans/common.rs
@@ -766,7 +766,8 @@ pub fn T_int(targ_cfg: @session::config) -> TypeRef {
     return match targ_cfg.arch {
       session::arch_x86 => T_i32(),
       session::arch_x86_64 => T_i64(),
-      session::arch_arm => T_i32()
+      session::arch_arm => T_i32(),
+      session::arch_mips => T_i32()
     };
 }
 
@@ -803,7 +804,8 @@ pub fn T_float(targ_cfg: @session::config) -> TypeRef {
     return match targ_cfg.arch {
       session::arch_x86 => T_f64(),
       session::arch_x86_64 => T_f64(),
-      session::arch_arm => T_f64()
+      session::arch_arm => T_f64(),
+      session::arch_mips => T_f64()
     };
 }
 
diff --git a/src/librustc/rustc.rc b/src/librustc/rustc.rc
index 8ab6a07a910..59811468f70 100644
--- a/src/librustc/rustc.rc
+++ b/src/librustc/rustc.rc
@@ -113,6 +113,7 @@ pub mod back {
     pub mod abi;
     pub mod upcall;
     pub mod arm;
+    pub mod mips;
     pub mod x86;
     pub mod x86_64;
     pub mod rpath;
diff --git a/src/libstd/bigint.rs b/src/libstd/bigint.rs
index 5212a17f373..5a0928e6a11 100644
--- a/src/libstd/bigint.rs
+++ b/src/libstd/bigint.rs
@@ -27,6 +27,7 @@ A BigDigit is half the size of machine word size.
 */
 #[cfg(target_arch = "x86")]
 #[cfg(target_arch = "arm")]
+#[cfg(target_arch = "mips")]
 pub type BigDigit = u16;
 
 /**
@@ -42,6 +43,7 @@ pub mod BigDigit {
 
     #[cfg(target_arch = "x86")]
     #[cfg(target_arch = "arm")]
+    #[cfg(target_arch = "mips")]
     pub const bits: uint = 16;
 
     #[cfg(target_arch = "x86_64")]
@@ -530,6 +532,7 @@ priv pure fn get_radix_base(radix: uint) -> (uint, uint) {
 
 #[cfg(target_arch = "arm")]
 #[cfg(target_arch = "x86")]
+#[cfg(target_arch = "mips")]
 priv pure fn get_radix_base(radix: uint) -> (uint, uint) {
     assert 1 < radix && radix <= 16;
     match radix {
@@ -946,6 +949,7 @@ mod biguint_tests {
 
         #[cfg(target_arch = "arm")]
         #[cfg(target_arch = "x86")]
+        #[cfg(target_arch = "mips")]
         fn test_shl_bits() {
             check(~[0x3210, 0x7654, 0xba98, 0xfedc,
                     0x3210, 0x7654, 0xba98, 0xfedc], 4,
@@ -962,6 +966,7 @@ mod biguint_tests {
     #[test]
     #[ignore(cfg(target_arch = "x86"))]
     #[ignore(cfg(target_arch = "arm"))]
+    #[ignore(cfg(target_arch = "mips"))]
     fn test_shr() {
         fn check(v: ~[BigDigit], shift: uint, ans: ~[BigDigit]) {
             assert BigUint::new(v) >> shift == BigUint::new(ans);
@@ -989,6 +994,7 @@ mod biguint_tests {
 
         #[cfg(target_arch = "arm")]
         #[cfg(target_arch = "x86")]
+        #[cfg(target_arch = "mips")]
         fn test_shr_bits() {
             check(~[0x2100, 0x6543, 0xa987, 0xedcb,
                     0x210f, 0x6543, 0xa987, 0xedcb, 0xf], 4,
diff --git a/src/libstd/net_tcp.rs b/src/libstd/net_tcp.rs
index 5b116705698..eea9f427326 100644
--- a/src/libstd/net_tcp.rs
+++ b/src/libstd/net_tcp.rs
@@ -1504,6 +1504,7 @@ pub mod test {
         }
         #[cfg(target_arch="x86")]
         #[cfg(target_arch="arm")]
+        #[cfg(target_arch="mips")]
         pub mod impl32 {
             use net::tcp::test::*;
 
diff --git a/src/libstd/uv_ll.rs b/src/libstd/uv_ll.rs
index b7111bfb023..6b6e644a5ee 100644
--- a/src/libstd/uv_ll.rs
+++ b/src/libstd/uv_ll.rs
@@ -132,6 +132,7 @@ pub struct uv_tcp_t_32bit_unix_riders {
 }
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 pub struct uv_tcp_t_32bit_unix_riders {
     a29: *u8, a30: *u8, a31: *u8,
 }
@@ -187,6 +188,7 @@ pub struct uv_write_t_32bit_unix_riders {
 }
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 pub struct uv_write_t_32bit_unix_riders {
     a13: *u8, a14: *u8, a15: *u8,
     a16: *u8,
@@ -215,6 +217,7 @@ pub struct uv_async_t_32bit_unix_riders {
 }
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 pub struct uv_async_t_32bit_unix_riders {
     a10: *u8,
 }
@@ -244,6 +247,7 @@ pub struct uv_timer_t_32bit_unix_riders {
 }
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 pub struct uv_timer_t_32bit_unix_riders {
     a10: *u8, a11: *u8, a12: *u8
 }
@@ -273,6 +277,7 @@ pub struct sockaddr_in6 {
 }
 #[cfg(target_arch="x86")]
 #[cfg(target_arch="arm")]
+#[cfg(target_arch="mips")]
 pub struct sockaddr_in6 {
     a0: *u8, a1: *u8,
     a2: *u8, a3: *u8,
@@ -291,7 +296,8 @@ pub mod addr_in_impl {
         a2: *u8, a3: *u8,
     }
     #[cfg(target_arch="x86")]
-#[cfg(target_arch="arm")]
+    #[cfg(target_arch="arm")]
+    #[cfg(target_arch="mips")]
     pub struct addr_in {
         a0: *u8, a1: *u8,
         a2: *u8, a3: *u8,
@@ -319,6 +325,7 @@ pub mod addrinfo_impl {
     }
     #[cfg(target_arch="x86")]
     #[cfg(target_arch="arm")]
+    #[cfg(target_arch="mips")]
     pub struct addrinfo {
         a00: *u8, a01: *u8, a02: *u8, a03: *u8,
         a04: *u8, a05: *u8, a06: *u8, a07: *u8,
@@ -402,6 +409,7 @@ pub mod uv_ll_struct_stubgen {
             }
             #[cfg(target_arch="x86")]
             #[cfg(target_arch="arm")]
+            #[cfg(target_arch="mips")]
             pub fn gen_stub_arch() -> uv_tcp_t {
                 uv_tcp_t {
                     fields: uv_handle_fields {
@@ -546,6 +554,7 @@ pub mod uv_ll_struct_stubgen {
         }
         #[cfg(target_arch = "x86")]
         #[cfg(target_arch="arm")]
+        #[cfg(target_arch="mips")]
         pub fn gen_stub_arch() -> uv_async_t {
             uv_async_t {
                 fields: uv_handle_fields {
@@ -602,6 +611,7 @@ pub mod uv_ll_struct_stubgen {
         }
         #[cfg(target_arch = "x86")]
         #[cfg(target_arch="arm")]
+        #[cfg(target_arch="mips")]
         pub fn gen_stub_arch() -> uv_timer_t {
             uv_timer_t {
                 fields: uv_handle_fields {
@@ -662,6 +672,7 @@ pub mod uv_ll_struct_stubgen {
         }
         #[cfg(target_arch="x86")]
         #[cfg(target_arch="arm")]
+        #[cfg(target_arch="mips")]
         pub fn gen_stub_arch() -> uv_write_t {
             uv_write_t {
                 fields: uv_handle_fields {
@@ -1748,6 +1759,7 @@ pub mod test {
         }
         #[cfg(target_arch="x86")]
         #[cfg(target_arch="arm")]
+        #[cfg(target_arch="mips")]
         pub mod impl32 {
             use uv_ll::test::*;
             #[test]
diff --git a/src/rustllvm/RustWrapper.cpp b/src/rustllvm/RustWrapper.cpp
index 3c38f3c6215..3af936d3461 100644
--- a/src/rustllvm/RustWrapper.cpp
+++ b/src/rustllvm/RustWrapper.cpp
@@ -97,6 +97,12 @@ void LLVMInitializeARMTarget();
 void LLVMInitializeARMTargetMC();
 void LLVMInitializeARMAsmPrinter();
 void LLVMInitializeARMAsmParser();
+
+void LLVMInitializeMipsTargetInfo();
+void LLVMInitializeMipsTarget();
+void LLVMInitializeMipsTargetMC();
+void LLVMInitializeMipsAsmPrinter();
+void LLVMInitializeMipsAsmParser();
 // Only initialize the platforms supported by Rust here,
 // because using --llvm-root will have multiple platforms
 // that rustllvm doesn't actually link to and it's pointless to put target info
@@ -114,6 +120,12 @@ void LLVMRustInitializeTargets() {
   LLVMInitializeARMTargetMC();
   LLVMInitializeARMAsmPrinter();
   LLVMInitializeARMAsmParser();	
+
+  LLVMInitializeMipsTargetInfo();
+  LLVMInitializeMipsTarget();
+  LLVMInitializeMipsTargetMC();
+  LLVMInitializeMipsAsmPrinter();
+  LLVMInitializeMipsAsmParser();	
 }
 
 // Custom memory manager for MCJITting. It needs special features
diff --git a/src/rustllvm/rustllvm.def.in b/src/rustllvm/rustllvm.def.in
index d3cbc490ada..f1acf9d0dc8 100644
--- a/src/rustllvm/rustllvm.def.in
+++ b/src/rustllvm/rustllvm.def.in
@@ -384,18 +384,25 @@ LLVMInitializeScalarOpts
 LLVMInitializeTarget
 LLVMInitializeTransformUtils
 LLVMInitializeARMAsmLexer
+LLVMInitializeMipsAsmLexer
 LLVMInitializeX86AsmLexer
 LLVMInitializeARMAsmParser
+LLVMInitializeMipsAsmParser
 LLVMInitializeX86AsmParser
 LLVMInitializeARMAsmPrinter
+LLVMInitializeMipsAsmPrinter
 LLVMInitializeX86AsmPrinter
 LLVMInitializeARMDisassembler
+LLVMInitializeMipsDisassembler
 LLVMInitializeX86Disassembler
 LLVMInitializeARMTarget
+LLVMInitializeMipsTarget
 LLVMInitializeX86Target
 LLVMInitializeARMTargetMC
+LLVMInitializeMipsTargetMC
 LLVMInitializeX86TargetMC
 LLVMInitializeARMTargetInfo
+LLVMInitializeMipsTargetInfo
 LLVMInitializeX86TargetInfo
 LLVMInsertBasicBlock
 LLVMInsertBasicBlockInContext