diff --git a/Cargo.toml b/Cargo.toml index 9802386e456..d1732aaec2f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,5 +1,5 @@ [workspace] - +resolver = "1" members = [ "crates/core_simd", "crates/std_float", diff --git a/crates/core_simd/examples/nbody.rs b/crates/core_simd/examples/nbody.rs index 664a0454bbd..df38a00967f 100644 --- a/crates/core_simd/examples/nbody.rs +++ b/crates/core_simd/examples/nbody.rs @@ -187,7 +187,7 @@ mod tests { fn main() { { let (energy_before, energy_after) = nbody::run(1000); - println!("Energy before: {}", energy_before); - println!("Energy after: {}", energy_after); + println!("Energy before: {energy_before}"); + println!("Energy after: {energy_after}"); } } diff --git a/crates/core_simd/examples/spectral_norm.rs b/crates/core_simd/examples/spectral_norm.rs index 012182e090b..d576bd0ccee 100644 --- a/crates/core_simd/examples/spectral_norm.rs +++ b/crates/core_simd/examples/spectral_norm.rs @@ -69,7 +69,7 @@ fn dot(x: &[f64], y: &[f64]) -> f64 { #[cfg(test)] #[test] fn test() { - assert_eq!(&format!("{:.9}", spectral_norm(100)), "1.274219991"); + assert_eq!(format!("{:.9}", spectral_norm(100)), "1.274219991"); } fn main() { diff --git a/crates/core_simd/src/intrinsics.rs b/crates/core_simd/src/intrinsics.rs index d5466822b93..dd6698e2ba5 100644 --- a/crates/core_simd/src/intrinsics.rs +++ b/crates/core_simd/src/intrinsics.rs @@ -68,7 +68,6 @@ extern "platform-intrinsic" { pub(crate) fn simd_cast(x: T) -> U; /// follows Rust's `T as U` semantics, including saturating float casts /// which amounts to the same as `simd_cast` for many cases - #[cfg(not(bootstrap))] pub(crate) fn simd_as(x: T) -> U; /// neg/fneg @@ -101,7 +100,7 @@ extern "platform-intrinsic" { /// val: vector of values to select if a lane is masked /// ptr: vector of pointers to read from /// mask: a "wide" mask of integers, selects as if simd_select(mask, read(ptr), val) - /// note, the LLVM intrinsic accepts a mask vector of + /// note, the LLVM intrinsic accepts a mask vector of `` /// FIXME: review this if/when we fix up our mask story in general? pub(crate) fn simd_gather(val: T, ptr: U, mask: V) -> T; /// llvm.masked.scatter diff --git a/crates/core_simd/src/masks.rs b/crates/core_simd/src/masks.rs index e04448a50be..fea687bdc1a 100644 --- a/crates/core_simd/src/masks.rs +++ b/crates/core_simd/src/masks.rs @@ -88,7 +88,7 @@ impl_element! { isize } /// The layout of this type is unspecified, and may change between platforms /// and/or Rust versions, and code should not assume that it is equivalent to /// `[T; LANES]`. -#[repr(transparent)] +#[cfg_attr(not(doc), repr(transparent))] // work around https://github.com/rust-lang/rust/issues/90435 pub struct Mask(mask_impl::Mask) where T: MaskElement, diff --git a/crates/core_simd/src/masks/full_masks.rs b/crates/core_simd/src/masks/full_masks.rs index bcedd2df225..1d13c45b8e7 100644 --- a/crates/core_simd/src/masks/full_masks.rs +++ b/crates/core_simd/src/masks/full_masks.rs @@ -260,7 +260,7 @@ where } } -impl core::convert::From> for Simd +impl From> for Simd where T: MaskElement, LaneCount: SupportedLaneCount, diff --git a/crates/core_simd/src/ops.rs b/crates/core_simd/src/ops.rs index 6e32eb11daf..b007456cf2c 100644 --- a/crates/core_simd/src/ops.rs +++ b/crates/core_simd/src/ops.rs @@ -42,7 +42,7 @@ macro_rules! unsafe_base { /// SAFETY: This macro should not be used for anything except Shl or Shr, and passed the appropriate shift intrinsic. /// It handles performing a bitand in addition to calling the shift operator, so that the result -/// is well-defined: LLVM can return a poison value if you shl, lshr, or ashr if rhs >= ::BITS +/// is well-defined: LLVM can return a poison value if you shl, lshr, or ashr if `rhs >= ::BITS` /// At worst, this will maybe add another instruction and cycle, /// at best, it may open up more optimization opportunities, /// or simply be elided entirely, especially for SIMD ISAs which default to this. diff --git a/crates/core_simd/src/ops/deref.rs b/crates/core_simd/src/ops/deref.rs index 9883a74c92d..302bf148bd3 100644 --- a/crates/core_simd/src/ops/deref.rs +++ b/crates/core_simd/src/ops/deref.rs @@ -71,7 +71,7 @@ macro_rules! deref_ops { #[inline] #[must_use = "operator returns a new vector without mutating the inputs"] - fn $call(self, rhs: &$simd) -> Self::Output { + fn $call(self, rhs: &'rhs $simd) -> Self::Output { (*self).$call(*rhs) } } diff --git a/crates/core_simd/src/swizzle_dyn.rs b/crates/core_simd/src/swizzle_dyn.rs index a4da461d546..ce621792534 100644 --- a/crates/core_simd/src/swizzle_dyn.rs +++ b/crates/core_simd/src/swizzle_dyn.rs @@ -18,7 +18,12 @@ where #![allow(unused_imports, unused_unsafe)] #[cfg(all(target_arch = "aarch64", target_endian = "little"))] use core::arch::aarch64::{uint8x8_t, vqtbl1q_u8, vtbl1_u8}; - #[cfg(all(target_arch = "arm", target_feature = "v7", target_endian = "little"))] + #[cfg(all( + target_arch = "arm", + target_feature = "v7", + target_feature = "neon", + target_endian = "little" + ))] use core::arch::arm::{uint8x8_t, vtbl1_u8}; #[cfg(target_arch = "wasm32")] use core::arch::wasm32 as wasm; diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs index 0f9854fe9d3..9aa7bacfce9 100644 --- a/crates/core_simd/src/vector.rs +++ b/crates/core_simd/src/vector.rs @@ -25,7 +25,7 @@ use core::convert::{TryFrom, TryInto}; /// let sum = array::from_fn(|i| a[i] + b[i]); /// let prod = array::from_fn(|i| a[i] * b[i]); /// -/// // `Simd` implements `From<[T; N]> +/// // `Simd` implements `From<[T; N]>` /// let (v, w) = (Simd::from(a), Simd::from(b)); /// // Which means arrays implement `Into>`. /// assert_eq!(v + w, sum.into());